misc.isa (8209:9e3f7f00fa90) misc.isa (10037:5cac77888310)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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57 if (!(condCode == COND_AL || condCode == COND_UC)) {
58 for (int x = 0; x < _numDestRegs; x++) {
59 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
60 }
61 }
62 }
63}};
64
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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57 if (!(condCode == COND_AL || condCode == COND_UC)) {
58 for (int x = 0; x < _numDestRegs; x++) {
59 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
60 }
61 }
62 }
63}};
64
65def template MrsBankedRegDeclare {{
66class %(class_name)s : public %(base_class)s
67{
68 protected:
69 uint8_t byteMask;
70 bool r;
71
72 public:
73 // Constructor
74 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
75 uint8_t _sysM, bool _r);
76 %(BasicExecDeclare)s
77};
78}};
79
80def template MrsBankedRegConstructor {{
81 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
82 IntRegIndex _dest,
83 uint8_t _sysM,
84 bool _r)
85 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest),
86 byteMask(_sysM), r(_r)
87 {
88 %(constructor)s;
89 if (!(condCode == COND_AL || condCode == COND_UC)) {
90 for (int x = 0; x < _numDestRegs; x++) {
91 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
92 }
93 }
94 }
95}};
96
97def template MsrBankedRegDeclare {{
98class %(class_name)s : public %(base_class)s
99{
100 protected:
101 bool r;
102
103 public:
104 // Constructor
105 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
106 uint8_t _sysM, bool _r);
107 %(BasicExecDeclare)s
108};
109}};
110
111def template MsrBankedRegConstructor {{
112 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
113 IntRegIndex _op1,
114 uint8_t _sysM,
115 bool _r)
116 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _sysM),
117 r(_r)
118 {
119 %(constructor)s;
120 if (!(condCode == COND_AL || condCode == COND_UC)) {
121 for (int x = 0; x < _numDestRegs; x++) {
122 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
123 }
124 }
125 }
126}};
127
65def template MsrRegDeclare {{
66class %(class_name)s : public %(base_class)s
67{
68 protected:
69 public:
70 // Constructor
71 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
72 %(BasicExecDeclare)s

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109 if (!(condCode == COND_AL || condCode == COND_UC)) {
110 for (int x = 0; x < _numDestRegs; x++) {
111 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
112 }
113 }
114 }
115}};
116
128def template MsrRegDeclare {{
129class %(class_name)s : public %(base_class)s
130{
131 protected:
132 public:
133 // Constructor
134 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
135 %(BasicExecDeclare)s

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172 if (!(condCode == COND_AL || condCode == COND_UC)) {
173 for (int x = 0; x < _numDestRegs; x++) {
174 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
175 }
176 }
177 }
178}};
179
180def template MrrcOpDeclare {{
181class %(class_name)s : public %(base_class)s
182{
183 protected:
184 public:
185 // Constructor
186 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
187 IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm);
188 %(BasicExecDeclare)s
189};
190}};
191
192def template MrrcOpConstructor {{
193 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
194 IntRegIndex op1,
195 IntRegIndex dest,
196 IntRegIndex dest2,
197 uint32_t imm)
198 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest,
199 dest2, imm)
200 {
201 %(constructor)s;
202 if (!(condCode == COND_AL || condCode == COND_UC)) {
203 for (int x = 0; x < _numDestRegs; x++) {
204 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
205 }
206 }
207 }
208}};
209
210def template McrrOpDeclare {{
211class %(class_name)s : public %(base_class)s
212{
213 protected:
214 public:
215 // Constructor
216 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2,
217 IntRegIndex _dest, uint32_t imm);
218 %(BasicExecDeclare)s
219};
220}};
221
222def template McrrOpConstructor {{
223 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
224 IntRegIndex op1,
225 IntRegIndex op2,
226 IntRegIndex dest,
227 uint32_t imm)
228 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2,
229 dest, imm)
230 {
231 %(constructor)s;
232 if (!(condCode == COND_AL || condCode == COND_UC)) {
233 for (int x = 0; x < _numDestRegs; x++) {
234 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
235 }
236 }
237 }
238}};
239
117def template ImmOpDeclare {{
118class %(class_name)s : public %(base_class)s
119{
120 protected:
121 public:
122 // Constructor
123 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
124 %(BasicExecDeclare)s

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305 if (!(condCode == COND_AL || condCode == COND_UC)) {
306 for (int x = 0; x < _numDestRegs; x++) {
307 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
308 }
309 }
310 }
311}};
312
240def template ImmOpDeclare {{
241class %(class_name)s : public %(base_class)s
242{
243 protected:
244 public:
245 // Constructor
246 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
247 %(BasicExecDeclare)s

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428 if (!(condCode == COND_AL || condCode == COND_UC)) {
429 for (int x = 0; x < _numDestRegs; x++) {
430 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
431 }
432 }
433 }
434}};
435
436def template RegImmImmOpDeclare {{
437class %(class_name)s : public %(base_class)s
438{
439 protected:
440 public:
441 // Constructor
442 %(class_name)s(ExtMachInst machInst,
443 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2);
444 %(BasicExecDeclare)s
445};
446}};
447
448def template RegImmImmOpConstructor {{
449 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
450 IntRegIndex _dest,
451 uint64_t _imm1,
452 uint64_t _imm2)
453 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
454 _dest, _imm1, _imm2)
455 {
456 %(constructor)s;
457 if (!(condCode == COND_AL || condCode == COND_UC)) {
458 for (int x = 0; x < _numDestRegs; x++) {
459 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
460 }
461 }
462 }
463}};
464
313def template RegRegImmImmOpDeclare {{
314class %(class_name)s : public %(base_class)s
315{
316 protected:
317 public:
318 // Constructor
319 %(class_name)s(ExtMachInst machInst,
320 IntRegIndex _dest, IntRegIndex _op1,

--- 84 unchanged lines hidden --- 		465def template RegRegImmImmOpDeclare {{
466class %(class_name)s : public %(base_class)s
467{
468 protected:
469 public:
470 // Constructor
471 %(class_name)s(ExtMachInst machInst,
472 IntRegIndex _dest, IntRegIndex _op1,

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