misc.isa (12358:386d26feb00f) misc.isa (12503:47b60911f9ba)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013,2017 ARM Limited
3// Copyright (c) 2010-2013,2017-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

--- 629 unchanged lines hidden (view full) ---

641 %(ea_code)s;
642
643 if (%(predicate_test)s) {
644 if (fault == NoFault) {
645 %(memacc_code)s;
646 }
647
648 if (fault == NoFault) {
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

--- 629 unchanged lines hidden (view full) ---

641 %(ea_code)s;
642
643 if (%(predicate_test)s) {
644 if (fault == NoFault) {
645 %(memacc_code)s;
646 }
647
648 if (fault == NoFault) {
649 Addr size = 64;
650 EA &= ~(size - 1);
651 fault = xc->writeMem(NULL, size, EA, memAccessFlags, NULL);
649 Addr op_size = xc->tcBase()->getSystemPtr()->cacheLineSize();
650 EA &= ~(op_size - 1);
651 fault = xc->writeMem(NULL, op_size, EA, memAccessFlags, NULL);
652 }
653 } else {
654 xc->setPredicate(false);
655 }
656
657 return fault;
658 }
659}};

--- 10 unchanged lines hidden (view full) ---

670 %(ea_code)s;
671
672 if (%(predicate_test)s) {
673 if (fault == NoFault) {
674 %(memacc_code)s;
675 }
676
677 if (fault == NoFault) {
652 }
653 } else {
654 xc->setPredicate(false);
655 }
656
657 return fault;
658 }
659}};

--- 10 unchanged lines hidden (view full) ---

670 %(ea_code)s;
671
672 if (%(predicate_test)s) {
673 if (fault == NoFault) {
674 %(memacc_code)s;
675 }
676
677 if (fault == NoFault) {
678 Addr size = 64;
679 EA &= ~(size - 1);
680 fault = xc->writeMem(NULL, size, EA, memAccessFlags, NULL);
678 Addr op_size = xc->tcBase()->getSystemPtr()->cacheLineSize();
679 EA &= ~(op_size - 1);
680 fault = xc->writeMem(NULL, op_size, EA, memAccessFlags, NULL);
681 }
682 } else {
683 xc->setPredicate(false);
684 }
685
686 return fault;
687 }
688}};
689
690def template Mcr15CompleteAcc {{
691 Fault %(class_name)s::completeAcc(PacketPtr pkt,
692 ExecContext *xc,
693 Trace::InstRecord *traceData) const
694 {
695 return NoFault;
696 }
697}};
681 }
682 } else {
683 xc->setPredicate(false);
684 }
685
686 return fault;
687 }
688}};
689
690def template Mcr15CompleteAcc {{
691 Fault %(class_name)s::completeAcc(PacketPtr pkt,
692 ExecContext *xc,
693 Trace::InstRecord *traceData) const
694 {
695 return NoFault;
696 }
697}};