| misc.isa (10418:7a76e13f0101) | misc.isa (10420:cc13df09fa55) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 169 unchanged lines hidden (view full) --- 178}}; 179 180def template MrrcOpDeclare {{ 181class %(class_name)s : public %(base_class)s 182{ 183 protected: 184 public: 185 // Constructor | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 169 unchanged lines hidden (view full) --- 178}}; 179 180def template MrrcOpDeclare {{ 181class %(class_name)s : public %(base_class)s 182{ 183 protected: 184 public: 185 // Constructor |
| 186 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, | 186 %(class_name)s(ExtMachInst machInst, MiscRegIndex _op1, |
| 187 IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm); 188 %(BasicExecDeclare)s 189}; 190}}; 191 192def template MrrcOpConstructor {{ 193 %(class_name)s::%(class_name)s(ExtMachInst machInst, | 187 IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm); 188 %(BasicExecDeclare)s 189}; 190}}; 191 192def template MrrcOpConstructor {{ 193 %(class_name)s::%(class_name)s(ExtMachInst machInst, |
| 194 IntRegIndex op1, | 194 MiscRegIndex op1, |
| 195 IntRegIndex dest, 196 IntRegIndex dest2, 197 uint32_t imm) 198 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest, 199 dest2, imm) 200 { 201 %(constructor)s; 202 if (!(condCode == COND_AL || condCode == COND_UC)) { --- 6 unchanged lines hidden (view full) --- 209 210def template McrrOpDeclare {{ 211class %(class_name)s : public %(base_class)s 212{ 213 protected: 214 public: 215 // Constructor 216 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2, | 195 IntRegIndex dest, 196 IntRegIndex dest2, 197 uint32_t imm) 198 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest, 199 dest2, imm) 200 { 201 %(constructor)s; 202 if (!(condCode == COND_AL || condCode == COND_UC)) { --- 6 unchanged lines hidden (view full) --- 209 210def template McrrOpDeclare {{ 211class %(class_name)s : public %(base_class)s 212{ 213 protected: 214 public: 215 // Constructor 216 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2, |
| 217 IntRegIndex _dest, uint32_t imm); | 217 MiscRegIndex _dest, uint32_t imm); |
| 218 %(BasicExecDeclare)s 219}; 220}}; 221 222def template McrrOpConstructor {{ 223 %(class_name)s::%(class_name)s(ExtMachInst machInst, 224 IntRegIndex op1, 225 IntRegIndex op2, | 218 %(BasicExecDeclare)s 219}; 220}}; 221 222def template McrrOpConstructor {{ 223 %(class_name)s::%(class_name)s(ExtMachInst machInst, 224 IntRegIndex op1, 225 IntRegIndex op2, |
| 226 IntRegIndex dest, | 226 MiscRegIndex dest, |
| 227 uint32_t imm) 228 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2, 229 dest, imm) 230 { 231 %(constructor)s; 232 if (!(condCode == COND_AL || condCode == COND_UC)) { 233 for (int x = 0; x < _numDestRegs; x++) { 234 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; --- 382 unchanged lines hidden --- | 227 uint32_t imm) 228 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2, 229 dest, imm) 230 { 231 %(constructor)s; 232 if (!(condCode == COND_AL || condCode == COND_UC)) { 233 for (int x = 0; x < _numDestRegs; x++) { 234 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; --- 382 unchanged lines hidden --- |