Cross Reference: /gem5/src/arch/arm/isa/templates/misc.isa

1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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44 public:
45 // Constructor
46 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest);
47 %(BasicExecDeclare)s
48};
49}};
50
51def template MrsConstructor {{

52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

52 %(class_name)s::%(class_name)s(ExtMachInst machInst,

53 IntRegIndex _dest)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest)
55 {
56 %(constructor)s;
57 if (!(condCode == COND_AL || condCode == COND_UC)) {
58 for (int x = 0; x < _numDestRegs; x++) {
59 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
60 }

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73 // Constructor
74 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
75 uint8_t _sysM, bool _r);
76 %(BasicExecDeclare)s
77};
78}};
79
80def template MrsBankedRegConstructor {{

81 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

81 %(class_name)s::%(class_name)s(ExtMachInst machInst,

82 IntRegIndex _dest,
83 uint8_t _sysM,
84 bool _r)
85 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest),
86 byteMask(_sysM), r(_r)
87 {
88 %(constructor)s;
89 if (!(condCode == COND_AL || condCode == COND_UC)) {

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104 // Constructor
105 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
106 uint8_t _sysM, bool _r);
107 %(BasicExecDeclare)s
108};
109}};
110
111def template MsrBankedRegConstructor {{

112 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

112 %(class_name)s::%(class_name)s(ExtMachInst machInst,

113 IntRegIndex _op1,
114 uint8_t _sysM,
115 bool _r)
116 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _sysM),
117 r(_r)
118 {
119 %(constructor)s;
120 if (!(condCode == COND_AL || condCode == COND_UC)) {

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132 public:
133 // Constructor
134 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
135 %(BasicExecDeclare)s
136};
137}};
138
139def template MsrRegConstructor {{

140 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

140 %(class_name)s::%(class_name)s(ExtMachInst machInst,

141 IntRegIndex _op1,
142 uint8_t mask)
143 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask)
144 {
145 %(constructor)s;
146 if (!(condCode == COND_AL || condCode == COND_UC)) {
147 for (int x = 0; x < _numDestRegs; x++) {
148 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];

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158 public:
159 // Constructor
160 %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask);
161 %(BasicExecDeclare)s
162};
163}};
164
165def template MsrImmConstructor {{

166 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

166 %(class_name)s::%(class_name)s(ExtMachInst machInst,

167 uint32_t imm,
168 uint8_t mask)
169 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask)
170 {
171 %(constructor)s;
172 if (!(condCode == COND_AL || condCode == COND_UC)) {
173 for (int x = 0; x < _numDestRegs; x++) {
174 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];

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185 // Constructor
186 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
187 IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm);
188 %(BasicExecDeclare)s
189};
190}};
191
192def template MrrcOpConstructor {{

193 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

193 %(class_name)s::%(class_name)s(ExtMachInst machInst,

194 IntRegIndex op1,
195 IntRegIndex dest,
196 IntRegIndex dest2,
197 uint32_t imm)
198 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest,
199 dest2, imm)
200 {
201 %(constructor)s;

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215 // Constructor
216 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2,
217 IntRegIndex _dest, uint32_t imm);
218 %(BasicExecDeclare)s
219};
220}};
221
222def template McrrOpConstructor {{

223 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

223 %(class_name)s::%(class_name)s(ExtMachInst machInst,

224 IntRegIndex op1,
225 IntRegIndex op2,
226 IntRegIndex dest,
227 uint32_t imm)
228 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2,
229 dest, imm)
230 {
231 %(constructor)s;

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244 public:
245 // Constructor
246 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
247 %(BasicExecDeclare)s
248};
249}};
250
251def template ImmOpConstructor {{

252 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)

252 %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)

253 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
254 {
255 %(constructor)s;
256 if (!(condCode == COND_AL || condCode == COND_UC)) {
257 for (int x = 0; x < _numDestRegs; x++) {
258 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
259 }
260 }

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268 public:
269 // Constructor
270 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm);
271 %(BasicExecDeclare)s
272};
273}};
274
275def template RegImmOpConstructor {{

276 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

276 %(class_name)s::%(class_name)s(ExtMachInst machInst,

277 IntRegIndex _dest, uint64_t _imm)
278 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm)
279 {
280 %(constructor)s;
281 if (!(condCode == COND_AL || condCode == COND_UC)) {
282 for (int x = 0; x < _numDestRegs; x++) {
283 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
284 }

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294 // Constructor
295 %(class_name)s(ExtMachInst machInst,
296 IntRegIndex _dest, IntRegIndex _op1);
297 %(BasicExecDeclare)s
298};
299}};
300
301def template RegRegOpConstructor {{

302 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

302 %(class_name)s::%(class_name)s(ExtMachInst machInst,

303 IntRegIndex _dest, IntRegIndex _op1)
304 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1)
305 {
306 %(constructor)s;
307 if (!(condCode == COND_AL || condCode == COND_UC)) {
308 for (int x = 0; x < _numDestRegs; x++) {
309 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
310 }

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321 %(class_name)s(ExtMachInst machInst,
322 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
323 uint64_t _imm);
324 %(BasicExecDeclare)s
325};
326}};
327
328def template RegRegRegImmOpConstructor {{

329 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

329 %(class_name)s::%(class_name)s(ExtMachInst machInst,

330 IntRegIndex _dest,
331 IntRegIndex _op1,
332 IntRegIndex _op2,
333 uint64_t _imm)
334 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
335 _dest, _op1, _op2, _imm)
336 {
337 %(constructor)s;

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352 %(class_name)s(ExtMachInst machInst,
353 IntRegIndex _dest, IntRegIndex _op1,
354 IntRegIndex _op2, IntRegIndex _op3);
355 %(BasicExecDeclare)s
356};
357}};
358
359def template RegRegRegRegOpConstructor {{

360 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

360 %(class_name)s::%(class_name)s(ExtMachInst machInst,

361 IntRegIndex _dest,
362 IntRegIndex _op1,
363 IntRegIndex _op2,
364 IntRegIndex _op3)
365 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
366 _dest, _op1, _op2, _op3)
367 {
368 %(constructor)s;

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382 // Constructor
383 %(class_name)s(ExtMachInst machInst,
384 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
385 %(BasicExecDeclare)s
386};
387}};
388
389def template RegRegRegOpConstructor {{

390 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

390 %(class_name)s::%(class_name)s(ExtMachInst machInst,

391 IntRegIndex _dest,
392 IntRegIndex _op1,
393 IntRegIndex _op2)
394 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
395 _dest, _op1, _op2)
396 {
397 %(constructor)s;
398 if (!(condCode == COND_AL || condCode == COND_UC)) {

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412 %(class_name)s(ExtMachInst machInst,
413 IntRegIndex _dest, IntRegIndex _op1,
414 uint64_t _imm);
415 %(BasicExecDeclare)s
416};
417}};
418
419def template RegRegImmOpConstructor {{

420 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

420 %(class_name)s::%(class_name)s(ExtMachInst machInst,

421 IntRegIndex _dest,
422 IntRegIndex _op1,
423 uint64_t _imm)
424 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
425 _dest, _op1, _imm)
426 {
427 %(constructor)s;
428 if (!(condCode == COND_AL || condCode == COND_UC)) {

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441 // Constructor
442 %(class_name)s(ExtMachInst machInst,
443 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2);
444 %(BasicExecDeclare)s
445};
446}};
447
448def template RegImmImmOpConstructor {{

449 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

449 %(class_name)s::%(class_name)s(ExtMachInst machInst,

450 IntRegIndex _dest,
451 uint64_t _imm1,
452 uint64_t _imm2)
453 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
454 _dest, _imm1, _imm2)
455 {
456 %(constructor)s;
457 if (!(condCode == COND_AL || condCode == COND_UC)) {

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471 %(class_name)s(ExtMachInst machInst,
472 IntRegIndex _dest, IntRegIndex _op1,
473 uint64_t _imm1, uint64_t _imm2);
474 %(BasicExecDeclare)s
475};
476}};
477
478def template RegRegImmImmOpConstructor {{

479 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

479 %(class_name)s::%(class_name)s(ExtMachInst machInst,

480 IntRegIndex _dest,
481 IntRegIndex _op1,
482 uint64_t _imm1,
483 uint64_t _imm2)
484 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
485 _dest, _op1, _imm1, _imm2)
486 {
487 %(constructor)s;

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501 // Constructor
502 %(class_name)s(ExtMachInst machInst,
503 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1);
504 %(BasicExecDeclare)s
505};
506}};
507
508def template RegImmRegOpConstructor {{

509 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

509 %(class_name)s::%(class_name)s(ExtMachInst machInst,

510 IntRegIndex _dest,
511 uint64_t _imm,
512 IntRegIndex _op1)
513 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
514 _dest, _imm, _op1)
515 {
516 %(constructor)s;
517 if (!(condCode == COND_AL || condCode == COND_UC)) {

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531 %(class_name)s(ExtMachInst machInst,
532 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1,
533 int32_t _shiftAmt, ArmShiftType _shiftType);
534 %(BasicExecDeclare)s
535};
536}};
537
538def template RegImmRegShiftOpConstructor {{

539 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

539 %(class_name)s::%(class_name)s(ExtMachInst machInst,