1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40def template MrsDeclare {{
41class %(class_name)s : public %(base_class)s
42{
43 protected:
44 public:
45 // Constructor
46 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest);
47 %(BasicExecDeclare)s
48};
49}};
50
51def template MrsConstructor {{
52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
53 IntRegIndex _dest)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest)
55 {
56 %(constructor)s;
57 }
58}};
59
60def template MsrRegDeclare {{
61class %(class_name)s : public %(base_class)s
62{
63 protected:
64 public:
65 // Constructor
66 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
67 %(BasicExecDeclare)s
68};
69}};
70
71def template MsrRegConstructor {{
72 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
73 IntRegIndex _op1,
74 uint8_t mask)
75 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask)
76 {
77 %(constructor)s;
78 }
79}};
80
81def template MsrImmDeclare {{
82class %(class_name)s : public %(base_class)s
83{
84 protected:
85 public:
86 // Constructor
87 %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask);
88 %(BasicExecDeclare)s
89};
90}};
91
92def template MsrImmConstructor {{
93 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
94 uint32_t imm,
95 uint8_t mask)
96 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask)
97 {
98 %(constructor)s;
99 }
100}};
101
102def template ImmOpDeclare {{
103class %(class_name)s : public %(base_class)s
104{
105 protected:
106 public:
107 // Constructor
108 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
109 %(BasicExecDeclare)s
110};
111}};
112
113def template ImmOpConstructor {{
114 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)
115 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
116 {
117 %(constructor)s;
118 }
119}};
120
121def template RegImmOpDeclare {{
122class %(class_name)s : public %(base_class)s
123{
124 protected:
125 public:
126 // Constructor
127 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm);
128 %(BasicExecDeclare)s
129};
130}};
131
132def template RegImmOpConstructor {{
133 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
134 IntRegIndex _dest, uint64_t _imm)
135 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm)
136 {
137 %(constructor)s;
138 }
139}};
140
141def template RegRegOpDeclare {{
142class %(class_name)s : public %(base_class)s
143{
144 protected:
145 public:
146 // Constructor
147 %(class_name)s(ExtMachInst machInst,
148 IntRegIndex _dest, IntRegIndex _op1);
149 %(BasicExecDeclare)s
150};
151}};
152
153def template RegRegOpConstructor {{
154 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
155 IntRegIndex _dest, IntRegIndex _op1)
156 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1)
157 {
158 %(constructor)s;
159 }
160}};
161
162def template RegRegRegImmOpDeclare {{
163class %(class_name)s : public %(base_class)s
164{
165 protected:
166 public:
167 // Constructor
168 %(class_name)s(ExtMachInst machInst,
169 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
170 uint64_t _imm);
171 %(BasicExecDeclare)s
172};
173}};
174
175def template RegRegRegImmOpConstructor {{
176 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
177 IntRegIndex _dest,
178 IntRegIndex _op1,
179 IntRegIndex _op2,
180 uint64_t _imm)
181 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
182 _dest, _op1, _op2, _imm)
183 {
184 %(constructor)s;
185 }
186}};
187
188def template RegRegRegRegOpDeclare {{
189class %(class_name)s : public %(base_class)s
190{
191 protected:
192 public:
193 // Constructor
194 %(class_name)s(ExtMachInst machInst,
195 IntRegIndex _dest, IntRegIndex _op1,
196 IntRegIndex _op2, IntRegIndex _op3);
197 %(BasicExecDeclare)s
198};
199}};
200
201def template RegRegRegRegOpConstructor {{
202 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
203 IntRegIndex _dest,
204 IntRegIndex _op1,
205 IntRegIndex _op2,
206 IntRegIndex _op3)
207 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
208 _dest, _op1, _op2, _op3)
209 {
210 %(constructor)s;
211 }
212}};
213
214def template RegRegRegOpDeclare {{
215class %(class_name)s : public %(base_class)s
216{
217 protected:
218 public:
219 // Constructor
220 %(class_name)s(ExtMachInst machInst,
221 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
222 %(BasicExecDeclare)s
223};
224}};
225
226def template RegRegRegOpConstructor {{
227 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
228 IntRegIndex _dest,
229 IntRegIndex _op1,
230 IntRegIndex _op2)
231 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
232 _dest, _op1, _op2)
233 {
234 %(constructor)s;
235 }
236}};
237
238def template RegRegImmOpDeclare {{
239class %(class_name)s : public %(base_class)s
240{
241 protected:
242 public:
243 // Constructor
244 %(class_name)s(ExtMachInst machInst,
245 IntRegIndex _dest, IntRegIndex _op1,
246 uint64_t _imm);
247 %(BasicExecDeclare)s
248};
249}};
250
251def template RegRegImmOpConstructor {{
252 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
253 IntRegIndex _dest,
254 IntRegIndex _op1,
255 uint64_t _imm)
256 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
257 _dest, _op1, _imm)
258 {
259 %(constructor)s;
260 }
261}};
262
263def template RegRegImmImmOpDeclare {{
264class %(class_name)s : public %(base_class)s
265{
266 protected:
267 public:
268 // Constructor
269 %(class_name)s(ExtMachInst machInst,
270 IntRegIndex _dest, IntRegIndex _op1,
271 uint64_t _imm1, uint64_t _imm2);
272 %(BasicExecDeclare)s
273};
274}};
275
276def template RegRegImmImmOpConstructor {{
277 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
278 IntRegIndex _dest,
279 IntRegIndex _op1,
280 uint64_t _imm1,
281 uint64_t _imm2)
282 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
283 _dest, _op1, _imm1, _imm2)
284 {
285 %(constructor)s;
286 }
287}};
288
289def template RegImmRegOpDeclare {{
290class %(class_name)s : public %(base_class)s
291{
292 protected:
293 public:
294 // Constructor
295 %(class_name)s(ExtMachInst machInst,
296 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1);
297 %(BasicExecDeclare)s
298};
299}};
300
301def template RegImmRegOpConstructor {{
302 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
303 IntRegIndex _dest,
304 uint64_t _imm,
305 IntRegIndex _op1)
306 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
307 _dest, _imm, _op1)
308 {
309 %(constructor)s;
310 }
311}};
312
313def template RegImmRegShiftOpDeclare {{
314class %(class_name)s : public %(base_class)s
315{
316 protected:
317 public:
318 // Constructor
319 %(class_name)s(ExtMachInst machInst,
320 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1,
321 int32_t _shiftAmt, ArmShiftType _shiftType);
322 %(BasicExecDeclare)s
323};
324}};
325
326def template RegImmRegShiftOpConstructor {{
327 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
328 IntRegIndex _dest,
329 uint64_t _imm,
330 IntRegIndex _op1,
331 int32_t _shiftAmt,
332 ArmShiftType _shiftType)
333 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
334 _dest, _imm, _op1, _shiftAmt, _shiftType)
335 {
336 %(constructor)s;
337 }
338}};
339
340def template ClrexDeclare {{
341 /**
342 * Static instruction class for "%(mnemonic)s".
343 */
344 class %(class_name)s : public %(base_class)s
345 {
346 public:
347
348 /// Constructor.
349 %(class_name)s(ExtMachInst machInst);
350
351 %(BasicExecDeclare)s
352
353 %(InitiateAccDeclare)s
354
355 %(CompleteAccDeclare)s
356 };
357}};
358
359def template ClrexInitiateAcc {{
360 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
361 Trace::InstRecord *traceData) const
362 {
363 Fault fault = NoFault;
364 %(op_decl)s;
365 %(op_rd)s;
366
367 if (%(predicate_test)s)
368 {
369 if (fault == NoFault) {
| 1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40def template MrsDeclare {{
41class %(class_name)s : public %(base_class)s
42{
43 protected:
44 public:
45 // Constructor
46 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest);
47 %(BasicExecDeclare)s
48};
49}};
50
51def template MrsConstructor {{
52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
53 IntRegIndex _dest)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest)
55 {
56 %(constructor)s;
57 }
58}};
59
60def template MsrRegDeclare {{
61class %(class_name)s : public %(base_class)s
62{
63 protected:
64 public:
65 // Constructor
66 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
67 %(BasicExecDeclare)s
68};
69}};
70
71def template MsrRegConstructor {{
72 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
73 IntRegIndex _op1,
74 uint8_t mask)
75 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask)
76 {
77 %(constructor)s;
78 }
79}};
80
81def template MsrImmDeclare {{
82class %(class_name)s : public %(base_class)s
83{
84 protected:
85 public:
86 // Constructor
87 %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask);
88 %(BasicExecDeclare)s
89};
90}};
91
92def template MsrImmConstructor {{
93 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
94 uint32_t imm,
95 uint8_t mask)
96 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask)
97 {
98 %(constructor)s;
99 }
100}};
101
102def template ImmOpDeclare {{
103class %(class_name)s : public %(base_class)s
104{
105 protected:
106 public:
107 // Constructor
108 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
109 %(BasicExecDeclare)s
110};
111}};
112
113def template ImmOpConstructor {{
114 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)
115 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
116 {
117 %(constructor)s;
118 }
119}};
120
121def template RegImmOpDeclare {{
122class %(class_name)s : public %(base_class)s
123{
124 protected:
125 public:
126 // Constructor
127 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm);
128 %(BasicExecDeclare)s
129};
130}};
131
132def template RegImmOpConstructor {{
133 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
134 IntRegIndex _dest, uint64_t _imm)
135 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm)
136 {
137 %(constructor)s;
138 }
139}};
140
141def template RegRegOpDeclare {{
142class %(class_name)s : public %(base_class)s
143{
144 protected:
145 public:
146 // Constructor
147 %(class_name)s(ExtMachInst machInst,
148 IntRegIndex _dest, IntRegIndex _op1);
149 %(BasicExecDeclare)s
150};
151}};
152
153def template RegRegOpConstructor {{
154 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
155 IntRegIndex _dest, IntRegIndex _op1)
156 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1)
157 {
158 %(constructor)s;
159 }
160}};
161
162def template RegRegRegImmOpDeclare {{
163class %(class_name)s : public %(base_class)s
164{
165 protected:
166 public:
167 // Constructor
168 %(class_name)s(ExtMachInst machInst,
169 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
170 uint64_t _imm);
171 %(BasicExecDeclare)s
172};
173}};
174
175def template RegRegRegImmOpConstructor {{
176 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
177 IntRegIndex _dest,
178 IntRegIndex _op1,
179 IntRegIndex _op2,
180 uint64_t _imm)
181 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
182 _dest, _op1, _op2, _imm)
183 {
184 %(constructor)s;
185 }
186}};
187
188def template RegRegRegRegOpDeclare {{
189class %(class_name)s : public %(base_class)s
190{
191 protected:
192 public:
193 // Constructor
194 %(class_name)s(ExtMachInst machInst,
195 IntRegIndex _dest, IntRegIndex _op1,
196 IntRegIndex _op2, IntRegIndex _op3);
197 %(BasicExecDeclare)s
198};
199}};
200
201def template RegRegRegRegOpConstructor {{
202 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
203 IntRegIndex _dest,
204 IntRegIndex _op1,
205 IntRegIndex _op2,
206 IntRegIndex _op3)
207 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
208 _dest, _op1, _op2, _op3)
209 {
210 %(constructor)s;
211 }
212}};
213
214def template RegRegRegOpDeclare {{
215class %(class_name)s : public %(base_class)s
216{
217 protected:
218 public:
219 // Constructor
220 %(class_name)s(ExtMachInst machInst,
221 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
222 %(BasicExecDeclare)s
223};
224}};
225
226def template RegRegRegOpConstructor {{
227 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
228 IntRegIndex _dest,
229 IntRegIndex _op1,
230 IntRegIndex _op2)
231 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
232 _dest, _op1, _op2)
233 {
234 %(constructor)s;
235 }
236}};
237
238def template RegRegImmOpDeclare {{
239class %(class_name)s : public %(base_class)s
240{
241 protected:
242 public:
243 // Constructor
244 %(class_name)s(ExtMachInst machInst,
245 IntRegIndex _dest, IntRegIndex _op1,
246 uint64_t _imm);
247 %(BasicExecDeclare)s
248};
249}};
250
251def template RegRegImmOpConstructor {{
252 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
253 IntRegIndex _dest,
254 IntRegIndex _op1,
255 uint64_t _imm)
256 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
257 _dest, _op1, _imm)
258 {
259 %(constructor)s;
260 }
261}};
262
263def template RegRegImmImmOpDeclare {{
264class %(class_name)s : public %(base_class)s
265{
266 protected:
267 public:
268 // Constructor
269 %(class_name)s(ExtMachInst machInst,
270 IntRegIndex _dest, IntRegIndex _op1,
271 uint64_t _imm1, uint64_t _imm2);
272 %(BasicExecDeclare)s
273};
274}};
275
276def template RegRegImmImmOpConstructor {{
277 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
278 IntRegIndex _dest,
279 IntRegIndex _op1,
280 uint64_t _imm1,
281 uint64_t _imm2)
282 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
283 _dest, _op1, _imm1, _imm2)
284 {
285 %(constructor)s;
286 }
287}};
288
289def template RegImmRegOpDeclare {{
290class %(class_name)s : public %(base_class)s
291{
292 protected:
293 public:
294 // Constructor
295 %(class_name)s(ExtMachInst machInst,
296 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1);
297 %(BasicExecDeclare)s
298};
299}};
300
301def template RegImmRegOpConstructor {{
302 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
303 IntRegIndex _dest,
304 uint64_t _imm,
305 IntRegIndex _op1)
306 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
307 _dest, _imm, _op1)
308 {
309 %(constructor)s;
310 }
311}};
312
313def template RegImmRegShiftOpDeclare {{
314class %(class_name)s : public %(base_class)s
315{
316 protected:
317 public:
318 // Constructor
319 %(class_name)s(ExtMachInst machInst,
320 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1,
321 int32_t _shiftAmt, ArmShiftType _shiftType);
322 %(BasicExecDeclare)s
323};
324}};
325
326def template RegImmRegShiftOpConstructor {{
327 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
328 IntRegIndex _dest,
329 uint64_t _imm,
330 IntRegIndex _op1,
331 int32_t _shiftAmt,
332 ArmShiftType _shiftType)
333 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
334 _dest, _imm, _op1, _shiftAmt, _shiftType)
335 {
336 %(constructor)s;
337 }
338}};
339
340def template ClrexDeclare {{
341 /**
342 * Static instruction class for "%(mnemonic)s".
343 */
344 class %(class_name)s : public %(base_class)s
345 {
346 public:
347
348 /// Constructor.
349 %(class_name)s(ExtMachInst machInst);
350
351 %(BasicExecDeclare)s
352
353 %(InitiateAccDeclare)s
354
355 %(CompleteAccDeclare)s
356 };
357}};
358
359def template ClrexInitiateAcc {{
360 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
361 Trace::InstRecord *traceData) const
362 {
363 Fault fault = NoFault;
364 %(op_decl)s;
365 %(op_rd)s;
366
367 if (%(predicate_test)s)
368 {
369 if (fault == NoFault) {
|