mem64.isa (12616:4b463b4dc098) mem64.isa (14058:a17b827fbf5e)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2014, 2017 ARM Limited
3// Copyright (c) 2011-2014, 2017, 2019 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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65 if (fault == NoFault) {
66 %(op_wb)s;
67 }
68
69 return fault;
70 }
71}};
72
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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65 if (fault == NoFault) {
66 %(op_wb)s;
67 }
68
69 return fault;
70 }
71}};
72
73def template Load64FpExecute {{
74 Fault %(class_name)s::execute(ExecContext *xc,
75 Trace::InstRecord *traceData) const
76 {
77 Addr EA;
78 Fault fault = NoFault;
79
80 %(op_decl)s;
81 %(op_rd)s;
82 %(ea_code)s;
83
84 if (fault == NoFault) {
85 fault = readMemAtomic(xc, traceData, EA, Mem, memAccessFlags);
86 }
87
88 if (fault == NoFault) {
89 %(memacc_code)s;
90 %(op_wb)s;
91 }
92
93 return fault;
94 }
95}};
96
73def template Store64Execute {{
74 Fault %(class_name)s::execute(ExecContext *xc,
75 Trace::InstRecord *traceData) const
76 {
77 Addr EA;
78 Fault fault = NoFault;
79
80 %(op_decl)s;

--- 627 unchanged lines hidden --- 		97def template Store64Execute {{
98 Fault %(class_name)s::execute(ExecContext *xc,
99 Trace::InstRecord *traceData) const
100 {
101 Addr EA;
102 Fault fault = NoFault;
103
104 %(op_decl)s;

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