mem.isa (7597:063f160e8b50) mem.isa (7610:ebae85c30d32)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 186 unchanged lines hidden (view full) ---

195 {
196 if (fault == NoFault) {
197 %(memacc_code)s;
198 }
199
200 if (fault == NoFault) {
201 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
202 memAccessFlags, NULL);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 186 unchanged lines hidden (view full) ---

195 {
196 if (fault == NoFault) {
197 %(memacc_code)s;
198 }
199
200 if (fault == NoFault) {
201 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
202 memAccessFlags, NULL);
203 if (traceData) { traceData->setData(Mem); }
204 }
205
206 if (fault == NoFault) {
207 %(op_wb)s;
208 }
209 } else {
210 xc->setPredicate(false);
211 }

--- 23 unchanged lines hidden (view full) ---

235 %(memacc_code)s;
236 }
237
238 uint64_t writeResult;
239
240 if (fault == NoFault) {
241 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
242 memAccessFlags, &writeResult);
203 }
204
205 if (fault == NoFault) {
206 %(op_wb)s;
207 }
208 } else {
209 xc->setPredicate(false);
210 }

--- 23 unchanged lines hidden (view full) ---

234 %(memacc_code)s;
235 }
236
237 uint64_t writeResult;
238
239 if (fault == NoFault) {
240 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
241 memAccessFlags, &writeResult);
243 if (traceData) { traceData->setData(Mem); }
244 }
245
246 if (fault == NoFault) {
247 %(postacc_code)s;
248 }
249
250 if (fault == NoFault) {
251 %(op_wb)s;

--- 25 unchanged lines hidden (view full) ---

277 {
278 if (fault == NoFault) {
279 %(memacc_code)s;
280 }
281
282 if (fault == NoFault) {
283 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
284 memAccessFlags, NULL);
242 }
243
244 if (fault == NoFault) {
245 %(postacc_code)s;
246 }
247
248 if (fault == NoFault) {
249 %(op_wb)s;

--- 25 unchanged lines hidden (view full) ---

275 {
276 if (fault == NoFault) {
277 %(memacc_code)s;
278 }
279
280 if (fault == NoFault) {
281 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
282 memAccessFlags, NULL);
285 if (traceData) { traceData->setData(Mem); }
286 }
287
288 // Need to write back any potential address register update
289 if (fault == NoFault) {
290 %(op_wb)s;
291 }
292 } else {
293 xc->setPredicate(false);

--- 22 unchanged lines hidden (view full) ---

316 {
317 if (fault == NoFault) {
318 %(memacc_code)s;
319 }
320
321 if (fault == NoFault) {
322 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
323 memAccessFlags, NULL);
283 }
284
285 // Need to write back any potential address register update
286 if (fault == NoFault) {
287 %(op_wb)s;
288 }
289 } else {
290 xc->setPredicate(false);

--- 22 unchanged lines hidden (view full) ---

313 {
314 if (fault == NoFault) {
315 %(memacc_code)s;
316 }
317
318 if (fault == NoFault) {
319 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
320 memAccessFlags, NULL);
324 if (traceData) { traceData->setData(Mem); }
325 }
326
327 // Need to write back any potential address register update
328 if (fault == NoFault) {
329 %(op_wb)s;
330 }
331 } else {
332 xc->setPredicate(false);

--- 421 unchanged lines hidden --- 		321 }
322
323 // Need to write back any potential address register update
324 if (fault == NoFault) {
325 %(op_wb)s;
326 }
327 } else {
328 xc->setPredicate(false);

--- 421 unchanged lines hidden ---