mem.isa (7205:e3dfcdf19561) mem.isa (7279:157b02cc0ba1)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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309 %(BasicExecDeclare)s
310
311 %(InitiateAccDeclare)s
312
313 %(CompleteAccDeclare)s
314 };
315}};
316
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 300 unchanged lines hidden (view full) ---

309 %(BasicExecDeclare)s
310
311 %(InitiateAccDeclare)s
312
313 %(CompleteAccDeclare)s
314 };
315}};
316
317def template LoadStoreDImmDeclare {{
318 /**
319 * Static instruction class for "%(mnemonic)s".
320 */
321 class %(class_name)s : public %(base_class)s
322 {
323 public:
324
325 /// Constructor.
326 %(class_name)s(ExtMachInst machInst,
327 uint32_t _dest, uint32_t _dest2,
328 uint32_t _base, bool _add, int32_t _imm);
329
330 %(BasicExecDeclare)s
331
332 %(InitiateAccDeclare)s
333
334 %(CompleteAccDeclare)s
335 };
336}};
337
317def template LoadStoreImmDeclare {{
318 /**
319 * Static instruction class for "%(mnemonic)s".
320 */
321 class %(class_name)s : public %(base_class)s
322 {
323 public:
324

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329 %(BasicExecDeclare)s
330
331 %(InitiateAccDeclare)s
332
333 %(CompleteAccDeclare)s
334 };
335}};
336
338def template LoadStoreImmDeclare {{
339 /**
340 * Static instruction class for "%(mnemonic)s".
341 */
342 class %(class_name)s : public %(base_class)s
343 {
344 public:
345

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350 %(BasicExecDeclare)s
351
352 %(InitiateAccDeclare)s
353
354 %(CompleteAccDeclare)s
355 };
356}};
357
358def template LoadStoreDRegDeclare {{
359 /**
360 * Static instruction class for "%(mnemonic)s".
361 */
362 class %(class_name)s : public %(base_class)s
363 {
364 public:
365
366 /// Constructor.
367 %(class_name)s(ExtMachInst machInst,
368 uint32_t _dest, uint32_t _dest2,
369 uint32_t _base, bool _add,
370 int32_t _shiftAmt, uint32_t _shiftType,
371 uint32_t _index);
372
373 %(BasicExecDeclare)s
374
375 %(InitiateAccDeclare)s
376
377 %(CompleteAccDeclare)s
378 };
379}};
380
337def template LoadStoreRegDeclare {{
338 /**
339 * Static instruction class for "%(mnemonic)s".
340 */
341 class %(class_name)s : public %(base_class)s
342 {
343 public:
344

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369 uint32_t _dest, uint32_t _op1, uint32_t _base)
370 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
371 (IntRegIndex)_dest, (IntRegIndex)_op1, (IntRegIndex)_base)
372 {
373 %(constructor)s;
374 }
375}};
376
381def template LoadStoreRegDeclare {{
382 /**
383 * Static instruction class for "%(mnemonic)s".
384 */
385 class %(class_name)s : public %(base_class)s
386 {
387 public:
388

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413 uint32_t _dest, uint32_t _op1, uint32_t _base)
414 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
415 (IntRegIndex)_dest, (IntRegIndex)_op1, (IntRegIndex)_base)
416 {
417 %(constructor)s;
418 }
419}};
420
421def template LoadStoreDImmConstructor {{
422 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
423 uint32_t _dest, uint32_t _dest2,
424 uint32_t _base, bool _add, int32_t _imm)
425 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
426 (IntRegIndex)_dest, (IntRegIndex)_dest2,
427 (IntRegIndex)_base, _add, _imm)
428 {
429 %(constructor)s;
430 }
431}};
432
377def template LoadStoreImmConstructor {{
378 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
379 uint32_t _dest, uint32_t _base, bool _add, int32_t _imm)
380 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
381 (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm)
382 {
383 %(constructor)s;
384 }
385}};
386
433def template LoadStoreImmConstructor {{
434 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
435 uint32_t _dest, uint32_t _base, bool _add, int32_t _imm)
436 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
437 (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm)
438 {
439 %(constructor)s;
440 }
441}};
442
443def template LoadStoreDRegConstructor {{
444 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
445 uint32_t _dest, uint32_t _dest2, uint32_t _base, bool _add,
446 int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index)
447 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
448 (IntRegIndex)_dest, (IntRegIndex)_dest2,
449 (IntRegIndex)_base, _add,
450 _shiftAmt, (ArmShiftType)_shiftType,
451 (IntRegIndex)_index)
452 {
453 %(constructor)s;
454 }
455}};
456
387def template LoadStoreRegConstructor {{
388 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
389 uint32_t _dest, uint32_t _base, bool _add,
390 int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index)
391 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
392 (IntRegIndex)_dest, (IntRegIndex)_base, _add,
393 _shiftAmt, (ArmShiftType)_shiftType,
394 (IntRegIndex)_index)
395 {
396 %(constructor)s;
397 }
398}};
457def template LoadStoreRegConstructor {{
458 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
459 uint32_t _dest, uint32_t _base, bool _add,
460 int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index)
461 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
462 (IntRegIndex)_dest, (IntRegIndex)_base, _add,
463 _shiftAmt, (ArmShiftType)_shiftType,
464 (IntRegIndex)_index)
465 {
466 %(constructor)s;
467 }
468}};