mem.isa (10196:be0e1724eb39) mem.isa (10199:6cf40d777682)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010, 2012 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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1209 uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
1210 _imm);
1211 uops[0]->setDelayedCommit();
1212 uops[1] = new %(wb_decl)s;
1213 uops[1]->setDelayedCommit();
1214 uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
1215 uops[2]->setFlag(StaticInst::IsControl);
1216 uops[2]->setFlag(StaticInst::IsIndirectControl);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010, 2012 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 1200 unchanged lines hidden (view full) ---

1209 uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
1210 _imm);
1211 uops[0]->setDelayedCommit();
1212 uops[1] = new %(wb_decl)s;
1213 uops[1]->setDelayedCommit();
1214 uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
1215 uops[2]->setFlag(StaticInst::IsControl);
1216 uops[2]->setFlag(StaticInst::IsIndirectControl);
1217 if (conditional)
1217 /* Also set flags on the macroop so that pre-microop decomposition
1218 branch prediction can work */
1219 setFlag(StaticInst::IsControl);
1220 setFlag(StaticInst::IsIndirectControl);
1221 if (conditional) {
1218 uops[2]->setFlag(StaticInst::IsCondControl);
1222 uops[2]->setFlag(StaticInst::IsCondControl);
1219 else
1223 setFlag(StaticInst::IsCondControl);
1224 } else {
1220 uops[2]->setFlag(StaticInst::IsUncondControl);
1225 uops[2]->setFlag(StaticInst::IsUncondControl);
1221 if (_base == INTREG_SP && _add && _imm == 4 && %(is_ras_pop)s)
1226 setFlag(StaticInst::IsUncondControl);
1227 }
1228 if (_base == INTREG_SP && _add && _imm == 4 && %(is_ras_pop)s) {
1222 uops[2]->setFlag(StaticInst::IsReturn);
1229 uops[2]->setFlag(StaticInst::IsReturn);
1230 setFlag(StaticInst::IsReturn);
1231 }
1223 uops[2]->setLastMicroop();
1224 } else {
1225 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
1226 uops[0]->setDelayedCommit();
1227 uops[1] = new %(wb_decl)s;
1228 uops[1]->setLastMicroop();
1229 }
1230#else

--- 12 unchanged lines hidden --- 		1232 uops[2]->setLastMicroop();
1233 } else {
1234 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
1235 uops[0]->setDelayedCommit();
1236 uops[1] = new %(wb_decl)s;
1237 uops[1]->setLastMicroop();
1238 }
1239#else

--- 12 unchanged lines hidden ---