1// -*- mode:c++ -*- 2 3// Copyright (c) 2010, 2012, 2014, 2016 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 568 unchanged lines hidden (view full) --- 577 class %(class_name)s : public %(base_class)s 578 { 579 public: 580 581 /// Constructor. 582 %(class_name)s(ExtMachInst machInst, 583 uint32_t _base, int _mode, bool _wb); 584 |
585 Fault execute(ExecContext *, Trace::InstRecord *) const; 586 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 587 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
588 }; 589}}; 590 591def template SrsDeclare {{ 592 /** 593 * Static instruction class for "%(mnemonic)s". 594 */ 595 class %(class_name)s : public %(base_class)s 596 { 597 public: 598 599 /// Constructor. 600 %(class_name)s(ExtMachInst machInst, 601 uint32_t _regMode, int _mode, bool _wb); 602 |
603 Fault execute(ExecContext *, Trace::InstRecord *) const; 604 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 605 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
606 }; 607}}; 608 609def template SwapDeclare {{ 610 /** 611 * Static instruction class for "%(mnemonic)s". 612 */ 613 class %(class_name)s : public %(base_class)s 614 { 615 public: 616 617 /// Constructor. 618 %(class_name)s(ExtMachInst machInst, 619 uint32_t _dest, uint32_t _op1, uint32_t _base); 620 |
621 Fault execute(ExecContext *, Trace::InstRecord *) const; 622 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 623 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
624 }; 625}}; 626 627def template LoadStoreDImmDeclare {{ 628 /** 629 * Static instruction class for "%(mnemonic)s". 630 */ 631 class %(class_name)s : public %(base_class)s 632 { 633 public: 634 635 /// Constructor. 636 %(class_name)s(ExtMachInst machInst, 637 uint32_t _dest, uint32_t _dest2, 638 uint32_t _base, bool _add, int32_t _imm); 639 |
640 Fault execute(ExecContext *, Trace::InstRecord *) const; 641 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 642 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
643 }; 644}}; 645 646def template StoreExDImmDeclare {{ 647 /** 648 * Static instruction class for "%(mnemonic)s". 649 */ 650 class %(class_name)s : public %(base_class)s 651 { 652 public: 653 654 /// Constructor. 655 %(class_name)s(ExtMachInst machInst, 656 uint32_t _result, uint32_t _dest, uint32_t _dest2, 657 uint32_t _base, bool _add, int32_t _imm); 658 |
659 Fault execute(ExecContext *, Trace::InstRecord *) const; 660 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 661 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
662 }; 663}}; 664 665def template LoadStoreImmDeclare {{ 666 /** 667 * Static instruction class for "%(mnemonic)s". 668 */ 669 class %(class_name)s : public %(base_class)s 670 { 671 public: 672 673 /// Constructor. 674 %(class_name)s(ExtMachInst machInst, 675 uint32_t _dest, uint32_t _base, bool _add, int32_t _imm); 676 |
677 Fault execute(ExecContext *, Trace::InstRecord *) const; 678 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 679 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
680 |
681 virtual void 682 annotateFault(ArmFault *fault) { 683 %(fa_code)s 684 } 685 }; 686}}; 687 688def template StoreExImmDeclare {{ --- 4 unchanged lines hidden (view full) --- 693 { 694 public: 695 696 /// Constructor. 697 %(class_name)s(ExtMachInst machInst, 698 uint32_t _result, uint32_t _dest, uint32_t _base, 699 bool _add, int32_t _imm); 700 |
701 Fault execute(ExecContext *, Trace::InstRecord *) const; 702 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 703 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
704 }; 705}}; 706 707def template StoreDRegDeclare {{ 708 /** 709 * Static instruction class for "%(mnemonic)s". 710 */ 711 class %(class_name)s : public %(base_class)s 712 { 713 public: 714 715 /// Constructor. 716 %(class_name)s(ExtMachInst machInst, 717 uint32_t _dest, uint32_t _dest2, 718 uint32_t _base, bool _add, 719 int32_t _shiftAmt, uint32_t _shiftType, 720 uint32_t _index); 721 |
722 Fault execute(ExecContext *, Trace::InstRecord *) const; 723 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 724 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
725 }; 726}}; 727 728def template StoreRegDeclare {{ 729 /** 730 * Static instruction class for "%(mnemonic)s". 731 */ 732 class %(class_name)s : public %(base_class)s 733 { 734 public: 735 736 /// Constructor. 737 %(class_name)s(ExtMachInst machInst, 738 uint32_t _dest, uint32_t _base, bool _add, 739 int32_t _shiftAmt, uint32_t _shiftType, 740 uint32_t _index); 741 |
742 Fault execute(ExecContext *, Trace::InstRecord *) const; 743 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 744 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
745 |
746 virtual void 747 annotateFault(ArmFault *fault) { 748 %(fa_code)s 749 } 750 }; 751}}; 752 753def template LoadDRegDeclare {{ --- 6 unchanged lines hidden (view full) --- 760 761 /// Constructor. 762 %(class_name)s(ExtMachInst machInst, 763 uint32_t _dest, uint32_t _dest2, 764 uint32_t _base, bool _add, 765 int32_t _shiftAmt, uint32_t _shiftType, 766 uint32_t _index); 767 |
768 Fault execute(ExecContext *, Trace::InstRecord *) const; 769 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 770 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
771 }; 772}}; 773 774def template LoadRegDeclare {{ 775 /** 776 * Static instruction class for "%(mnemonic)s". 777 */ 778 class %(class_name)s : public %(base_class)s 779 { 780 public: 781 782 /// Constructor. 783 %(class_name)s(ExtMachInst machInst, 784 uint32_t _dest, uint32_t _base, bool _add, 785 int32_t _shiftAmt, uint32_t _shiftType, 786 uint32_t _index); 787 |
788 Fault execute(ExecContext *, Trace::InstRecord *) const; 789 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 790 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
791 |
792 virtual void 793 annotateFault(ArmFault *fault) { 794 %(fa_code)s 795 } 796 }; 797}}; 798 799def template LoadImmDeclare {{ 800 /** 801 * Static instruction class for "%(mnemonic)s". 802 */ 803 class %(class_name)s : public %(base_class)s 804 { 805 public: 806 807 /// Constructor. 808 %(class_name)s(ExtMachInst machInst, 809 uint32_t _dest, uint32_t _base, bool _add, int32_t _imm); 810 |
811 Fault execute(ExecContext *, Trace::InstRecord *) const; 812 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 813 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
814 |
815 virtual void 816 annotateFault(ArmFault *fault) { 817 %(fa_code)s 818 } 819 }; 820}}; 821 |
822def template RfeConstructor {{ 823 %(class_name)s::%(class_name)s(ExtMachInst machInst, 824 uint32_t _base, int _mode, bool _wb) 825 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 826 (IntRegIndex)_base, (AddrMode)_mode, _wb) 827 { 828 %(constructor)s; 829 if (!(condCode == COND_AL || condCode == COND_UC)) { --- 397 unchanged lines hidden --- |