43a44,72
> def template PanicExecute {{
> Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
> Trace::InstRecord *traceData) const
> {
> panic("Execute function executed when it shouldn't be!\n");
> return NoFault;
> }
> }};
>
> def template PanicInitiateAcc {{
> Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
> Trace::InstRecord *traceData) const
> {
> panic("InitiateAcc function executed when it shouldn't be!\n");
> return NoFault;
> }
> }};
>
> def template PanicCompleteAcc {{
> Fault %(class_name)s::completeAcc(PacketPtr pkt,
> %(CPU_exec_context)s *xc,
> Trace::InstRecord *traceData) const
> {
> panic("CompleteAcc function executed when it shouldn't be!\n");
> return NoFault;
> }
> }};
>
>
76c105,106
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
112c142,143
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
175c206,207
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
211c243,244
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
248c281,282
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
288c322,323
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
331c366,367
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
368,369c404,405
<
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
407c443,444
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
446c483,484
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
472c510,511
< if (fault == NoFault && machInst.itstateMask != 0) {
---
> if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
498c537,538
< } else if (fault == NoFault && machInst.itstateMask != 0) {
---
> } else if (fault == NoFault && machInst.itstateMask != 0 &&
> (!isMicroop() || isLastMicroop())) {
794c834
< def template LoadStoreDRegDeclare {{
---
> def template StoreDRegDeclare {{
817c857
< def template LoadStoreRegDeclare {{
---
> def template StoreRegDeclare {{
838a879,943
> def template LoadDRegDeclare {{
> /**
> * Static instruction class for "%(mnemonic)s".
> */
> class %(class_name)s : public %(base_class)s
> {
> public:
>
> /// Constructor.
> %(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _dest2,
> uint32_t _base, bool _add,
> int32_t _shiftAmt, uint32_t _shiftType,
> uint32_t _index);
>
> %(BasicExecDeclare)s
>
> %(InitiateAccDeclare)s
>
> %(CompleteAccDeclare)s
> };
> }};
>
> def template LoadRegDeclare {{
> /**
> * Static instruction class for "%(mnemonic)s".
> */
> class %(class_name)s : public %(base_class)s
> {
> public:
>
> /// Constructor.
> %(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _base, bool _add,
> int32_t _shiftAmt, uint32_t _shiftType,
> uint32_t _index);
>
> %(BasicExecDeclare)s
>
> %(InitiateAccDeclare)s
>
> %(CompleteAccDeclare)s
> };
> }};
>
> def template LoadImmDeclare {{
> /**
> * Static instruction class for "%(mnemonic)s".
> */
> class %(class_name)s : public %(base_class)s
> {
> public:
>
> /// Constructor.
> %(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _base, bool _add, int32_t _imm);
>
> %(BasicExecDeclare)s
>
> %(InitiateAccDeclare)s
>
> %(CompleteAccDeclare)s
> };
> }};
>
853a959,965
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _base, _mode, _wb);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
863a976,982
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _regMode, _mode, _wb);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
885a1005,1011
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add, _imm);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
898a1025,1032
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _result, _dest, _dest2,
> _base, _add, _imm);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
908a1043,1049
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
920a1062,1069
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _result, _dest,
> _base, _add, _imm);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
924c1073
< def template LoadStoreDRegConstructor {{
---
> def template StoreDRegConstructor {{
934a1084,1091
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
938c1095
< def template LoadStoreRegConstructor {{
---
> def template StoreRegConstructor {{
947a1105,1112
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> uops[0] = new %(acc_name)s(machInst, _dest, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> #endif
949a1115,1211
>
> def template LoadDRegConstructor {{
> inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _dest2, uint32_t _base, bool _add,
> int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index)
> : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
> (IntRegIndex)_dest, (IntRegIndex)_dest2,
> (IntRegIndex)_base, _add,
> _shiftAmt, (ArmShiftType)_shiftType,
> (IntRegIndex)_index)
> {
> %(constructor)s;
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> if ((_dest == _index) || (_dest2 == _index)) {
> IntRegIndex wbIndexReg = INTREG_UREG0;
> uops[0] = new MicroUopRegMov(machInst, INTREG_UREG0, _index);
> uops[1] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[2] = new %(wb_decl)s;
> uops[2]->setLastMicroop();
> } else {
> IntRegIndex wbIndexReg = index;
> uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> }
> #endif
> }
> }};
>
> def template LoadRegConstructor {{
> inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _base, bool _add,
> int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index)
> : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
> (IntRegIndex)_dest, (IntRegIndex)_base, _add,
> _shiftAmt, (ArmShiftType)_shiftType,
> (IntRegIndex)_index)
> {
> %(constructor)s;
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> if (_dest == INTREG_PC) {
> IntRegIndex wbIndexReg = index;
> uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[1] = new %(wb_decl)s;
> uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
> uops[2]->setLastMicroop();
> } else if(_dest == _index) {
> IntRegIndex wbIndexReg = INTREG_UREG0;
> uops[0] = new MicroUopRegMov(machInst, INTREG_UREG0, _index);
> uops[1] = new %(acc_name)s(machInst, _dest, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[2] = new %(wb_decl)s;
> uops[2]->setLastMicroop();
> } else {
> IntRegIndex wbIndexReg = index;
> uops[0] = new %(acc_name)s(machInst, _dest, _base, _add,
> _shiftAmt, _shiftType, _index);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
>
> }
> #endif
> }
> }};
>
> def template LoadImmConstructor {{
> inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
> uint32_t _dest, uint32_t _base, bool _add, int32_t _imm)
> : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
> (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm)
> {
> %(constructor)s;
> #if %(use_uops)d
> assert(numMicroops >= 2);
> uops = new StaticInstPtr[numMicroops];
> if (_dest == INTREG_PC) {
> uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
> _imm);
> uops[1] = new %(wb_decl)s;
> uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
> uops[2]->setLastMicroop();
> } else {
> uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
> uops[1] = new %(wb_decl)s;
> uops[1]->setLastMicroop();
> }
> #endif
> }
> }};
>