1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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912 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
913 (IntRegIndex)_base, (AddrMode)_mode, _wb)
914 {
915 %(constructor)s;
916#if %(use_uops)d
917 assert(numMicroops >= 2);
918 uops = new StaticInstPtr[numMicroops];
919 uops[0] = new %(acc_name)s(machInst, _base, _mode, _wb);
920 uops[1] = new %(wb_decl)s;
921 uops[1]->setLastMicroop();
922#endif
923 }
924}};
925
926def template SrsConstructor {{
927 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
928 uint32_t _regMode, int _mode, bool _wb)
929 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
930 (OperatingMode)_regMode, (AddrMode)_mode, _wb)
931 {
932 %(constructor)s;
933#if %(use_uops)d
934 assert(numMicroops >= 2);
935 uops = new StaticInstPtr[numMicroops];
936 uops[0] = new %(acc_name)s(machInst, _regMode, _mode, _wb);
937 uops[1] = new %(wb_decl)s;
938 uops[1]->setLastMicroop();
939#endif
940 }
941}};
942
943def template SwapConstructor {{
944 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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958 (IntRegIndex)_dest, (IntRegIndex)_dest2,
959 (IntRegIndex)_base, _add, _imm)
960 {
961 %(constructor)s;
962#if %(use_uops)d
963 assert(numMicroops >= 2);
964 uops = new StaticInstPtr[numMicroops];
965 uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add, _imm);
966 uops[1] = new %(wb_decl)s;
967 uops[1]->setLastMicroop();
968#endif
969 }
970}};
971
972def template StoreExDImmConstructor {{
973 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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979 (IntRegIndex)_base, _add, _imm)
980 {
981 %(constructor)s;
982#if %(use_uops)d
983 assert(numMicroops >= 2);
984 uops = new StaticInstPtr[numMicroops];
985 uops[0] = new %(acc_name)s(machInst, _result, _dest, _dest2,
986 _base, _add, _imm);
987 uops[1] = new %(wb_decl)s;
988 uops[1]->setLastMicroop();
989#endif
990 }
991}};
992
993def template LoadStoreImmConstructor {{
994 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
995 uint32_t _dest, uint32_t _base, bool _add, int32_t _imm)
996 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
997 (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm)
998 {
999 %(constructor)s;
1000#if %(use_uops)d
1001 assert(numMicroops >= 2);
1002 uops = new StaticInstPtr[numMicroops];
1003 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
1004 uops[1] = new %(wb_decl)s;
1005 uops[1]->setLastMicroop();
1006#endif
1007 }
1008}};
1009
1010def template StoreExImmConstructor {{
1011 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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1016 (IntRegIndex)_base, _add, _imm)
1017 {
1018 %(constructor)s;
1019#if %(use_uops)d
1020 assert(numMicroops >= 2);
1021 uops = new StaticInstPtr[numMicroops];
1022 uops[0] = new %(acc_name)s(machInst, _result, _dest,
1023 _base, _add, _imm);
1024 uops[1] = new %(wb_decl)s;
1025 uops[1]->setLastMicroop();
1026#endif
1027 }
1028}};
1029
1030def template StoreDRegConstructor {{
1031 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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1038 (IntRegIndex)_index)
1039 {
1040 %(constructor)s;
1041#if %(use_uops)d
1042 assert(numMicroops >= 2);
1043 uops = new StaticInstPtr[numMicroops];
1044 uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
1045 _shiftAmt, _shiftType, _index);
1046 uops[1] = new %(wb_decl)s;
1047 uops[1]->setLastMicroop();
1048#endif
1049 }
1050}};
1051
1052def template StoreRegConstructor {{
1053 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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1059 (IntRegIndex)_index)
1060 {
1061 %(constructor)s;
1062#if %(use_uops)d
1063 assert(numMicroops >= 2);
1064 uops = new StaticInstPtr[numMicroops];
1065 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add,
1066 _shiftAmt, _shiftType, _index);
1067 uops[1] = new %(wb_decl)s;
1068 uops[1]->setLastMicroop();
1069#endif
1070 }
1071}};
1072
1073def template LoadDRegConstructor {{
1074 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,

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1082 {
1083 %(constructor)s;
1084#if %(use_uops)d
1085 assert(numMicroops >= 2);
1086 uops = new StaticInstPtr[numMicroops];
1087 if ((_dest == _index) || (_dest2 == _index)) {
1088 IntRegIndex wbIndexReg = INTREG_UREG0;
1089 uops[0] = new MicroUopRegMov(machInst, INTREG_UREG0, _index);
1090 uops[1] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
1091 _shiftAmt, _shiftType, _index);
1092 uops[2] = new %(wb_decl)s;
1093 uops[2]->setLastMicroop();
1094 } else {
1095 IntRegIndex wbIndexReg = index;
1096 uops[0] = new %(acc_name)s(machInst, _dest, _dest2, _base, _add,
1097 _shiftAmt, _shiftType, _index);
1098 uops[1] = new %(wb_decl)s;
1099 uops[1]->setLastMicroop();
1100 }
1101#endif
1102 }
1103}};
1104
1105def template LoadRegConstructor {{

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1114 %(constructor)s;
1115#if %(use_uops)d
1116 assert(numMicroops >= 2);
1117 uops = new StaticInstPtr[numMicroops];
1118 if (_dest == INTREG_PC) {
1119 IntRegIndex wbIndexReg = index;
1120 uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
1121 _shiftAmt, _shiftType, _index);
1122 uops[1] = new %(wb_decl)s;
1123 uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
1124 uops[2]->setLastMicroop();
1125 } else if(_dest == _index) {
1126 IntRegIndex wbIndexReg = INTREG_UREG0;
1127 uops[0] = new MicroUopRegMov(machInst, INTREG_UREG0, _index);
1128 uops[1] = new %(acc_name)s(machInst, _dest, _base, _add,
1129 _shiftAmt, _shiftType, _index);
1130 uops[2] = new %(wb_decl)s;
1131 uops[2]->setLastMicroop();
1132 } else {
1133 IntRegIndex wbIndexReg = index;
1134 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add,
1135 _shiftAmt, _shiftType, _index);
1136 uops[1] = new %(wb_decl)s;
1137 uops[1]->setLastMicroop();
1138
1139 }
1140#endif
1141 }
1142}};
1143

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1149 {
1150 %(constructor)s;
1151#if %(use_uops)d
1152 assert(numMicroops >= 2);
1153 uops = new StaticInstPtr[numMicroops];
1154 if (_dest == INTREG_PC) {
1155 uops[0] = new %(acc_name)s(machInst, INTREG_UREG0, _base, _add,
1156 _imm);
1157 uops[1] = new %(wb_decl)s;
1158 uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
1159 uops[2]->setLastMicroop();
1160 } else {
1161 uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);
1162 uops[1] = new %(wb_decl)s;
1163 uops[1]->setLastMicroop();
1164 }
1165#endif
1166 }
1167}};
1168