macromem.isa (7639:8c09b7ff5b57) macromem.isa (7646:a444dbee8c07)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 202 unchanged lines hidden (view full) ---

211 }
212
213 %(BasicExecDeclare)s
214 };
215}};
216
217////////////////////////////////////////////////////////////////////
218//
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 202 unchanged lines hidden (view full) ---

211 }
212
213 %(BasicExecDeclare)s
214 };
215}};
216
217////////////////////////////////////////////////////////////////////
218//
219// Integer = Integer
220//
221
222def template MicroIntMovDeclare {{
223 class %(class_name)s : public %(base_class)s
224 {
225 public:
226 %(class_name)s(ExtMachInst machInst,
227 RegIndex _ura, RegIndex _urb);
228 %(BasicExecDeclare)s
229 };
230}};
231def template MicroIntMovConstructor {{
232 %(class_name)s::%(class_name)s(ExtMachInst machInst,
233 RegIndex _ura,
234 RegIndex _urb)
235 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
236 _ura, _urb)
237 {
238 %(constructor)s;
239 }
240}};
241
242////////////////////////////////////////////////////////////////////
243//
219// Integer = Integer op Immediate microops
220//
221
222def template MicroIntImmDeclare {{
223 class %(class_name)s : public %(base_class)s
224 {
225 public:
226 %(class_name)s(ExtMachInst machInst,
227 RegIndex _ura, RegIndex _urb,
244// Integer = Integer op Immediate microops
245//
246
247def template MicroIntImmDeclare {{
248 class %(class_name)s : public %(base_class)s
249 {
250 public:
251 %(class_name)s(ExtMachInst machInst,
252 RegIndex _ura, RegIndex _urb,
228 uint8_t _imm);
253 int32_t _imm);
229 %(BasicExecDeclare)s
230 };
231}};
232
233def template MicroIntImmConstructor {{
234 %(class_name)s::%(class_name)s(ExtMachInst machInst,
235 RegIndex _ura,
236 RegIndex _urb,
254 %(BasicExecDeclare)s
255 };
256}};
257
258def template MicroIntImmConstructor {{
259 %(class_name)s::%(class_name)s(ExtMachInst machInst,
260 RegIndex _ura,
261 RegIndex _urb,
237 uint8_t _imm)
262 int32_t _imm)
238 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
239 _ura, _urb, _imm)
240 {
241 %(constructor)s;
242 }
243}};
244
263 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
264 _ura, _urb, _imm)
265 {
266 %(constructor)s;
267 }
268}};
269
270def template MicroIntRegDeclare {{
271 class %(class_name)s : public %(base_class)s
272 {
273 public:
274 %(class_name)s(ExtMachInst machInst,
275 RegIndex _ura, RegIndex _urb, RegIndex _urc,
276 int32_t _shiftAmt, ArmShiftType _shiftType);
277 %(BasicExecDeclare)s
278 };
279}};
280
281def template MicroIntRegConstructor {{
282 %(class_name)s::%(class_name)s(ExtMachInst machInst,
283 RegIndex _ura, RegIndex _urb, RegIndex _urc,
284 int32_t _shiftAmt, ArmShiftType _shiftType)
285 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
286 _ura, _urb, _urc, _shiftAmt, _shiftType)
287 {
288 %(constructor)s;
289 }
290}};
291
245////////////////////////////////////////////////////////////////////
246//
247// Macro Memory-format instructions
248//
249
250def template MacroMemDeclare {{
251/**
252 * Static instructions class for a store multiple instruction

--- 96 unchanged lines hidden --- 		292////////////////////////////////////////////////////////////////////
293//
294// Macro Memory-format instructions
295//
296
297def template MacroMemDeclare {{
298/**
299 * Static instructions class for a store multiple instruction

--- 96 unchanged lines hidden ---