1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 121 unchanged lines hidden (view full) --- 130 IntRegIndex _ura, 131 IntRegIndex _urb, 132 IntRegIndex _urc) 133 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 134 _ura, _urb, _urc) 135 { 136 %(constructor)s; 137 if (!(condCode == COND_AL || condCode == COND_UC)) { |
138 flags[IsCondControl] = true; |
139 for (int x = 0; x < _numDestRegs; x++) { 140 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 141 } |
142 } else { 143 flags[IsUncondControl] = true; |
144 } 145 } 146}}; 147 148//////////////////////////////////////////////////////////////////// 149// 150// Integer = Integer op Integer microops 151// --- 340 unchanged lines hidden --- |