1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2014 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 39 unchanged lines hidden (view full) --- 48 49def template MicroMemDeclare {{ 50 class %(class_name)s : public %(base_class)s 51 { 52 public: 53 %(class_name)s(ExtMachInst machInst, 54 RegIndex _ura, RegIndex _urb, bool _up, 55 uint8_t _imm); |
56 Fault execute(ExecContext *, Trace::InstRecord *) const override; 57 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; 58 Fault completeAcc(PacketPtr, ExecContext *, 59 Trace::InstRecord *) const override; |
60 }; 61}}; 62 63def template MicroMemConstructor {{ 64 %(class_name)s::%(class_name)s(ExtMachInst machInst, 65 RegIndex _ura, 66 RegIndex _urb, 67 bool _up, --- 13 unchanged lines hidden (view full) --- 81 82def template MicroMemPairDeclare {{ 83 class %(class_name)s : public %(base_class)s 84 { 85 public: 86 %(class_name)s(ExtMachInst machInst, 87 RegIndex _dreg1, RegIndex _dreg2, RegIndex _base, 88 bool _up, uint8_t _imm); |
89 Fault execute(ExecContext *, Trace::InstRecord *) const override; 90 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; 91 Fault completeAcc(PacketPtr, ExecContext *, 92 Trace::InstRecord *) const override; |
93 }; 94}}; 95 96def template MicroMemPairConstructor {{ 97 %(class_name)s::%(class_name)s(ExtMachInst machInst, 98 RegIndex _dreg1, 99 RegIndex _dreg2, 100 RegIndex _base, --- 30 unchanged lines hidden (view full) --- 131 %(constructor)s; 132 if (!(condCode == COND_AL || condCode == COND_UC)) { 133 for (int x = 0; x < _numDestRegs; x++) { 134 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 135 } 136 } 137 } 138 |
139 Fault execute(ExecContext *, Trace::InstRecord *) const override; 140 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; 141 Fault completeAcc(PacketPtr, ExecContext *, 142 Trace::InstRecord *) const override; |
143 }; 144}}; 145 146//////////////////////////////////////////////////////////////////// 147// 148// PC = Integer(ura) 149// CPSR = Integer(urb) 150// 151 152def template MicroSetPCCPSRDeclare {{ 153 class %(class_name)s : public %(base_class)s 154 { 155 public: 156 %(class_name)s(ExtMachInst machInst, 157 IntRegIndex _ura, 158 IntRegIndex _urb, 159 IntRegIndex _urc); |
160 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
161 }; 162}}; 163 164def template MicroSetPCCPSRConstructor {{ 165 %(class_name)s::%(class_name)s(ExtMachInst machInst, 166 IntRegIndex _ura, 167 IntRegIndex _urb, 168 IntRegIndex _urc) --- 18 unchanged lines hidden (view full) --- 187// 188 189def template MicroIntDeclare {{ 190 class %(class_name)s : public %(base_class)s 191 { 192 public: 193 %(class_name)s(ExtMachInst machInst, 194 RegIndex _ura, RegIndex _urb, RegIndex _urc); |
195 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
196 }; 197}}; 198 199def template MicroIntConstructor {{ 200 %(class_name)s::%(class_name)s(ExtMachInst machInst, 201 RegIndex _ura, 202 RegIndex _urb, 203 RegIndex _urc) --- 45 unchanged lines hidden (view full) --- 249 %(constructor)s; 250 if (!(condCode == COND_AL || condCode == COND_UC)) { 251 for (int x = 0; x < _numDestRegs; x++) { 252 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 253 } 254 } 255 } 256 |
257 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
258 }; 259}}; 260 261def template MicroNeonMixExecute {{ 262 template <class Element> 263 Fault %(class_name)s<Element>::execute(ExecContext *xc, 264 Trace::InstRecord *traceData) const 265 { --- 36 unchanged lines hidden (view full) --- 302 %(constructor)s; 303 if (!(condCode == COND_AL || condCode == COND_UC)) { 304 for (int x = 0; x < _numDestRegs; x++) { 305 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 306 } 307 } 308 } 309 |
310 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
311 }; 312}}; 313 314//////////////////////////////////////////////////////////////////// 315// 316// Integer = Integer 317// 318 319def template MicroIntMovDeclare {{ 320 class %(class_name)s : public %(base_class)s 321 { 322 public: 323 %(class_name)s(ExtMachInst machInst, 324 RegIndex _ura, RegIndex _urb); |
325 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
326 }; 327}}; 328def template MicroIntMovConstructor {{ 329 %(class_name)s::%(class_name)s(ExtMachInst machInst, 330 RegIndex _ura, 331 RegIndex _urb) 332 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 333 _ura, _urb) --- 14 unchanged lines hidden (view full) --- 348 349def template MicroIntImmDeclare {{ 350 class %(class_name)s : public %(base_class)s 351 { 352 public: 353 %(class_name)s(ExtMachInst machInst, 354 RegIndex _ura, RegIndex _urb, 355 int32_t _imm); |
356 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
357 }; 358}}; 359 360def template MicroIntImmConstructor {{ 361 %(class_name)s::%(class_name)s(ExtMachInst machInst, 362 RegIndex _ura, 363 RegIndex _urb, 364 int32_t _imm) --- 23 unchanged lines hidden (view full) --- 388 389def template MicroIntRegDeclare {{ 390 class %(class_name)s : public %(base_class)s 391 { 392 public: 393 %(class_name)s(ExtMachInst machInst, 394 RegIndex _ura, RegIndex _urb, RegIndex _urc, 395 int32_t _shiftAmt, ArmShiftType _shiftType); |
396 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
397 }; 398}}; 399 400def template MicroIntXERegConstructor {{ 401 %(class_name)s::%(class_name)s(ExtMachInst machInst, 402 RegIndex _ura, RegIndex _urb, RegIndex _urc, 403 ArmExtendType _type, uint32_t _shiftAmt) 404 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, --- 5 unchanged lines hidden (view full) --- 410 411def template MicroIntXERegDeclare {{ 412 class %(class_name)s : public %(base_class)s 413 { 414 public: 415 %(class_name)s(ExtMachInst machInst, 416 RegIndex _ura, RegIndex _urb, RegIndex _urc, 417 ArmExtendType _type, uint32_t _shiftAmt); |
418 Fault execute(ExecContext *, Trace::InstRecord *) const override; |
419 }; 420}}; 421 422def template MicroIntRegConstructor {{ 423 %(class_name)s::%(class_name)s(ExtMachInst machInst, 424 RegIndex _ura, RegIndex _urb, RegIndex _urc, 425 int32_t _shiftAmt, ArmShiftType _shiftType) 426 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, --- 217 unchanged lines hidden --- |