1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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64 RegIndex _ura,
65 RegIndex _urb,
66 bool _up,
67 uint8_t _imm)
68 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
69 _ura, _urb, _up, _imm)
70 {
71 %(constructor)s;
72 }
73}};
74
75////////////////////////////////////////////////////////////////////
76//
77// Neon load/store microops
78//
79

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84 public:
85 %(class_name)s(ExtMachInst machInst, RegIndex _dest,
86 RegIndex _ura, uint32_t _imm, unsigned extraMemFlags)
87 : %(base_class)s("%(mnemonic)s", machInst,
88 %(op_class)s, _dest, _ura, _imm)
89 {
90 memAccessFlags |= extraMemFlags;
91 %(constructor)s;
92 }
93
94 %(BasicExecDeclare)s
95 %(InitiateAccDeclare)s
96 %(CompleteAccDeclare)s
97 };
98}};
99

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116 %(class_name)s::%(class_name)s(ExtMachInst machInst,
117 RegIndex _ura,
118 RegIndex _urb,
119 RegIndex _urc)
120 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
121 _ura, _urb, _urc)
122 {
123 %(constructor)s;
124 }
125}};
126
127def template MicroNeonMemExecDeclare {{
128 template
129 Fault %(class_name)s<%(targs)s>::execute(
130 %(CPU_exec_context)s *, Trace::InstRecord *) const;
131 template

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153 {
154 public:
155 %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _op1,
156 uint8_t _step) :
157 %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
158 _dest, _op1, _step)
159 {
160 %(constructor)s;
161 }
162
163 %(BasicExecDeclare)s
164 };
165}};
166
167def template MicroNeonMixExecute {{
168 template <class Element>

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203 {
204 public:
205 %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _op1,
206 uint8_t _step, unsigned _lane) :
207 %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
208 _dest, _op1, _step, _lane)
209 {
210 %(constructor)s;
211 }
212
213 %(BasicExecDeclare)s
214 };
215}};
216
217////////////////////////////////////////////////////////////////////
218//

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231def template MicroIntMovConstructor {{
232 %(class_name)s::%(class_name)s(ExtMachInst machInst,
233 RegIndex _ura,
234 RegIndex _urb)
235 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
236 _ura, _urb)
237 {
238 %(constructor)s;
239 }
240}};
241
242////////////////////////////////////////////////////////////////////
243//
244// Integer = Integer op Immediate microops
245//
246

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259 %(class_name)s::%(class_name)s(ExtMachInst machInst,
260 RegIndex _ura,
261 RegIndex _urb,
262 int32_t _imm)
263 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
264 _ura, _urb, _imm)
265 {
266 %(constructor)s;
267 }
268}};
269
270def template MicroIntRegDeclare {{
271 class %(class_name)s : public %(base_class)s
272 {
273 public:
274 %(class_name)s(ExtMachInst machInst,

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281def template MicroIntRegConstructor {{
282 %(class_name)s::%(class_name)s(ExtMachInst machInst,
283 RegIndex _ura, RegIndex _urb, RegIndex _urc,
284 int32_t _shiftAmt, ArmShiftType _shiftType)
285 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
286 _ura, _urb, _urc, _shiftAmt, _shiftType)
287 {
288 %(constructor)s;
289 }
290}};
291
292////////////////////////////////////////////////////////////////////
293//
294// Macro Memory-format instructions
295//
296

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312def template MacroMemConstructor {{
313%(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
314 bool index, bool up, bool user, bool writeback, bool load,
315 uint32_t reglist)
316 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn,
317 index, up, user, writeback, load, reglist)
318{
319 %(constructor)s;
320}
321
322}};
323
324def template VMemMultDeclare {{
325class %(class_name)s : public %(base_class)s
326{
327 public:

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336def template VMemMultConstructor {{
337%(class_name)s::%(class_name)s(ExtMachInst machInst, unsigned width,
338 RegIndex rn, RegIndex vd, unsigned regs, unsigned inc,
339 uint32_t size, uint32_t align, RegIndex rm)
340 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, width,
341 rn, vd, regs, inc, size, align, rm)
342{
343 %(constructor)s;
344}
345}};
346
347def template VMemSingleDeclare {{
348class %(class_name)s : public %(base_class)s
349{
350 public:
351 // Constructor

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359def template VMemSingleConstructor {{
360%(class_name)s::%(class_name)s(ExtMachInst machInst, bool all, unsigned width,
361 RegIndex rn, RegIndex vd, unsigned regs, unsigned inc,
362 uint32_t size, uint32_t align, RegIndex rm, unsigned lane)
363 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, all, width,
364 rn, vd, regs, inc, size, align, rm, lane)
365{
366 %(constructor)s;
367}
368}};
369
370def template MacroVFPMemDeclare {{
371/**
372 * Static instructions class for a store multiple instruction
373 */
374class %(class_name)s : public %(base_class)s

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385def template MacroVFPMemConstructor {{
386%(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
387 RegIndex vd, bool single, bool up, bool writeback, bool load,
388 uint32_t offset)
389 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn,
390 vd, single, up, writeback, load, offset)
391{
392 %(constructor)s;
393}
394
395}};