branch.isa (8146:18368caa8489) | branch.isa (8203:78b9f056d58a) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 106 unchanged lines hidden (view full) --- 115 if (!(condCode == COND_AL || condCode == COND_UC)) { 116 for (int x = 0; x < _numDestRegs; x++) { 117 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 118 } 119 flags[IsCondControl] = true; 120 } else { 121 flags[IsUncondControl] = true; 122 } | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 106 unchanged lines hidden (view full) --- 115 if (!(condCode == COND_AL || condCode == COND_UC)) { 116 for (int x = 0; x < _numDestRegs; x++) { 117 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 118 } 119 flags[IsCondControl] = true; 120 } else { 121 flags[IsUncondControl] = true; 122 } |
123 if (%(is_ras_pop)s) 124 flags[IsReturn] = true; |
|
123 } 124}}; 125 126def template BranchRegCondDeclare {{ 127class %(class_name)s : public %(base_class)s 128{ 129 public: 130 // Constructor --- 14 unchanged lines hidden (view full) --- 145 if (!(condCode == COND_AL || condCode == COND_UC)) { 146 for (int x = 0; x < _numDestRegs; x++) { 147 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 148 } 149 flags[IsCondControl] = true; 150 } else { 151 flags[IsUncondControl] = true; 152 } | 125 } 126}}; 127 128def template BranchRegCondDeclare {{ 129class %(class_name)s : public %(base_class)s 130{ 131 public: 132 // Constructor --- 14 unchanged lines hidden (view full) --- 147 if (!(condCode == COND_AL || condCode == COND_UC)) { 148 for (int x = 0; x < _numDestRegs; x++) { 149 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 150 } 151 flags[IsCondControl] = true; 152 } else { 153 flags[IsUncondControl] = true; 154 } |
155 if (%(is_ras_pop)s) 156 flags[IsReturn] = true; |
|
153 } 154}}; 155 156def template BranchRegRegDeclare {{ 157class %(class_name)s : public %(base_class)s 158{ 159 public: 160 // Constructor --- 84 unchanged lines hidden --- | 157 } 158}}; 159 160def template BranchRegRegDeclare {{ 161class %(class_name)s : public %(base_class)s 162{ 163 public: 164 // Constructor --- 84 unchanged lines hidden --- |