| operands.isa (8304:16911ff780d3) | operands.isa (8449:4be49ad47c74) |
|---|---|
| 1// -*- mode:c++ -*- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 35// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39// 40// Authors: Stephen Hines 41 42def operand_types {{ | 1// -*- mode:c++ -*- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 35// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39// 40// Authors: Stephen Hines 41 42def operand_types {{ |
| 43 'sb' : ('signed int', 8), 44 'ub' : ('unsigned int', 8), 45 'sh' : ('signed int', 16), 46 'uh' : ('unsigned int', 16), 47 'sw' : ('signed int', 32), 48 'uw' : ('unsigned int', 32), 49 'ud' : ('unsigned int', 64), 50 'tud' : ('twin64 int', 64), 51 'sf' : ('float', 32), 52 'df' : ('float', 64) | 43 'sb' : 'int8_t', 44 'ub' : 'uint8_t', 45 'sh' : 'int16_t', 46 'uh' : 'uint16_t', 47 'sw' : 'int32_t', 48 'uw' : 'uint32_t', 49 'ud' : 'uint64_t', 50 'tud' : 'Twin64_t', 51 'sf' : 'float', 52 'df' : 'double' |
| 53}}; 54 55let {{ 56 maybePCRead = ''' 57 ((%(reg_idx)s == PCReg) ? readPC(xc) : xc->%(func)s(this, %(op_idx)s)) 58 ''' 59 maybeAlignedPCRead = ''' 60 ((%(reg_idx)s == PCReg) ? (roundDown(readPC(xc), 4)) : --- 221 unchanged lines hidden --- | 53}}; 54 55let {{ 56 maybePCRead = ''' 57 ((%(reg_idx)s == PCReg) ? readPC(xc) : xc->%(func)s(this, %(op_idx)s)) 58 ''' 59 maybeAlignedPCRead = ''' 60 ((%(reg_idx)s == PCReg) ? (roundDown(readPC(xc), 4)) : --- 221 unchanged lines hidden --- |