| operands.isa (7858:ee6641d7c713) | operands.isa (8139:2b2efc67f6df) |
|---|---|
| 1// -*- mode:c++ -*- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 214 unchanged lines hidden (view full) --- 223 'FpscrQc': cntrlRegNC('MISCREG_FPSCR_QC'), 224 'FpscrExc': cntrlRegNC('MISCREG_FPSCR_EXC'), 225 'Cpacr': cntrlReg('MISCREG_CPACR'), 226 'Fpexc': cntrlRegNC('MISCREG_FPEXC'), 227 'Sctlr': cntrlRegNC('MISCREG_SCTLR'), 228 'SevMailbox': cntrlRegNC('MISCREG_SEV_MAILBOX'), 229 230 #Register fields for microops | 1// -*- mode:c++ -*- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 214 unchanged lines hidden (view full) --- 223 'FpscrQc': cntrlRegNC('MISCREG_FPSCR_QC'), 224 'FpscrExc': cntrlRegNC('MISCREG_FPSCR_EXC'), 225 'Cpacr': cntrlReg('MISCREG_CPACR'), 226 'Fpexc': cntrlRegNC('MISCREG_FPEXC'), 227 'Sctlr': cntrlRegNC('MISCREG_SCTLR'), 228 'SevMailbox': cntrlRegNC('MISCREG_SEV_MAILBOX'), 229 230 #Register fields for microops |
| 231 'Ra' : intReg('ura'), | 231 'URa' : intReg('ura'), |
| 232 'IWRa' : intRegIWPC('ura'), 233 'Fa' : floatReg('ura'), | 232 'IWRa' : intRegIWPC('ura'), 233 'Fa' : floatReg('ura'), |
| 234 'Rb' : intReg('urb'), 235 'Rc' : intReg('urc'), | 234 'URb' : intReg('urb'), 235 'URc' : intReg('urc'), |
| 236 237 #Memory Operand 238 'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), srtNormal), 239 240 #PCState fields 241 'PC': pcStateReg('instPC', srtPC), 242 'NPC': pcStateReg('instNPC', srtPC), 243 'pNPC': pcStateReg('instNPC', srtEPC), --- 15 unchanged lines hidden --- | 236 237 #Memory Operand 238 'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), srtNormal), 239 240 #PCState fields 241 'PC': pcStateReg('instPC', srtPC), 242 'NPC': pcStateReg('instNPC', srtPC), 243 'pNPC': pcStateReg('instNPC', srtEPC), --- 15 unchanged lines hidden --- |