Cross Reference: /gem5/src/arch/arm/isa/operands.isa

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operands.isa (7797:998b217dcae7)	operands.isa (7858:ee6641d7c713)
1// -- mode:c++ -- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 231 unchanged lines hidden (view full) --- 240 #PCState fields 241 'PC': pcStateReg('instPC', srtPC), 242 'NPC': pcStateReg('instNPC', srtPC), 243 'pNPC': pcStateReg('instNPC', srtEPC), 244 'IWNPC': pcStateReg('instIWNPC', srtPC), 245 'Thumb': pcStateReg('thumb', srtPC), 246 'NextThumb': pcStateReg('nextThumb', srtMode), 247 'NextJazelle': pcStateReg('nextJazelle', srtMode),	1// -- mode:c++ -- 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 231 unchanged lines hidden (view full) --- 240 #PCState fields 241 'PC': pcStateReg('instPC', srtPC), 242 'NPC': pcStateReg('instNPC', srtPC), 243 'pNPC': pcStateReg('instNPC', srtEPC), 244 'IWNPC': pcStateReg('instIWNPC', srtPC), 245 'Thumb': pcStateReg('thumb', srtPC), 246 'NextThumb': pcStateReg('nextThumb', srtMode), 247 'NextJazelle': pcStateReg('nextJazelle', srtMode),
	248 'ForcedItState': pcStateReg('forcedItState', srtMode),
248 249 #Register operands depending on a field in the instruction encoding. These 250 #should be avoided since they may not be portable across different 251 #encodings of the same instruction. 252 'Rd': intReg('RD'), 253 'Rm': intReg('RM'), 254 'Rs': intReg('RS'), 255 'Rn': intReg('RN'), 256 'Rt': intReg('RT') 257}};	249 250 #Register operands depending on a field in the instruction encoding. These 251 #should be avoided since they may not be portable across different 252 #encodings of the same instruction. 253 'Rd': intReg('RD'), 254 'Rm': intReg('RM'), 255 'Rs': intReg('RS'), 256 'Rn': intReg('RN'), 257 'Rt': intReg('RT') 258}};