| operands.isa (6721:77318ac91316) | operands.isa (6724:70129fdded75) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 52 unchanged lines hidden (view full) --- 61 62 #Destination register for load/store double instructions 63 'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead, maybePCWrite), 64 'Rde': ('IntReg', 'uw', '(RD | 1)', 'IsInteger', 5, maybePCRead, maybePCWrite), 65 66 'Rhi': ('IntReg', 'uw', 'INTREG_RHI', 'IsInteger', 7), 67 'Rlo': ('IntReg', 'uw', 'INTREG_RLO', 'IsInteger', 8), 68 'LR': ('IntReg', 'uw', 'INTREG_LR', 'IsInteger', 9), | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 52 unchanged lines hidden (view full) --- 61 62 #Destination register for load/store double instructions 63 'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead, maybePCWrite), 64 'Rde': ('IntReg', 'uw', '(RD | 1)', 'IsInteger', 5, maybePCRead, maybePCWrite), 65 66 'Rhi': ('IntReg', 'uw', 'INTREG_RHI', 'IsInteger', 7), 67 'Rlo': ('IntReg', 'uw', 'INTREG_RLO', 'IsInteger', 8), 68 'LR': ('IntReg', 'uw', 'INTREG_LR', 'IsInteger', 9), |
| 69 'CondCodes': ('IntReg', 'uw', 'INTREG_CONDCODES', 'IsInteger', 10), |
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| 69 70 #Register fields for microops 71 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite), 72 'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite), 73 74 #General Purpose Floating Point Reg Operands 75 'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 20), 76 'Fn': ('FloatReg', 'df', 'FN', 'IsFloating', 21), --- 14 unchanged lines hidden --- | 70 71 #Register fields for microops 72 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite), 73 'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite), 74 75 #General Purpose Floating Point Reg Operands 76 'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 20), 77 'Fn': ('FloatReg', 'df', 'FN', 'IsFloating', 21), --- 14 unchanged lines hidden --- |