operands.isa (14091:090449e74135) operands.isa (14106:293e3f4b1321)
1// -*- mode:c++ -*-
2// Copyright (c) 2010-2014, 2016-2018 ARM Limited
3// All rights reserved
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

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525 'AA64FpDestP1V1L': vectorRegElem('1'),
526 'AA64FpDestP2V1L': vectorRegElem('2'),
527 'AA64FpDestP3V1L': vectorRegElem('3'),
528 'AA64FpDestSV1L': vectorRegElem('0', 'sf', zeroing = True),
529 'AA64FpDestDV1L': vectorRegElem('0', 'df', zeroing = True),
530 'AA64FpDestQV1L': vectorRegElem('0', 'tud', zeroing = True)
531 }),
532
1// -*- mode:c++ -*-
2// Copyright (c) 2010-2014, 2016-2018 ARM Limited
3// All rights reserved
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

--- 516 unchanged lines hidden (view full) ---

525 'AA64FpDestP1V1L': vectorRegElem('1'),
526 'AA64FpDestP2V1L': vectorRegElem('2'),
527 'AA64FpDestP3V1L': vectorRegElem('3'),
528 'AA64FpDestSV1L': vectorRegElem('0', 'sf', zeroing = True),
529 'AA64FpDestDV1L': vectorRegElem('0', 'df', zeroing = True),
530 'AA64FpDestQV1L': vectorRegElem('0', 'tud', zeroing = True)
531 }),
532
533 # Temporary registers for SVE interleaving
534 'AA64IntrlvReg0': vectorReg('INTRLVREG0',
535 {
536 'AA64IntrlvReg0P0': vectorRegElem('0'),
537 'AA64IntrlvReg0P1': vectorRegElem('1'),
538 'AA64IntrlvReg0P2': vectorRegElem('2'),
539 'AA64IntrlvReg0P3': vectorRegElem('3'),
540 'AA64IntrlvReg0S': vectorRegElem('0', 'sf', zeroing = True),
541 'AA64IntrlvReg0D': vectorRegElem('0', 'df', zeroing = True),
542 'AA64IntrlvReg0Q': vectorRegElem('0', 'tud', zeroing = True)
543 }),
544
545 'AA64IntrlvReg1': vectorReg('INTRLVREG1',
546 {
547 'AA64IntrlvReg1P0': vectorRegElem('0'),
548 'AA64IntrlvReg1P1': vectorRegElem('1'),
549 'AA64IntrlvReg1P2': vectorRegElem('2'),
550 'AA64IntrlvReg1P3': vectorRegElem('3'),
551 'AA64IntrlvReg1S': vectorRegElem('0', 'sf', zeroing = True),
552 'AA64IntrlvReg1D': vectorRegElem('0', 'df', zeroing = True),
553 'AA64IntrlvReg1Q': vectorRegElem('0', 'tud', zeroing = True)
554 }),
555
556 'AA64IntrlvReg2': vectorReg('INTRLVREG2',
557 {
558 'AA64IntrlvReg2P0': vectorRegElem('0'),
559 'AA64IntrlvReg2P1': vectorRegElem('1'),
560 'AA64IntrlvReg2P2': vectorRegElem('2'),
561 'AA64IntrlvReg2P3': vectorRegElem('3'),
562 'AA64IntrlvReg2S': vectorRegElem('0', 'sf', zeroing = True),
563 'AA64IntrlvReg2D': vectorRegElem('0', 'df', zeroing = True),
564 'AA64IntrlvReg2Q': vectorRegElem('0', 'tud', zeroing = True)
565 }),
566
567 'AA64IntrlvReg3': vectorReg('INTRLVREG3',
568 {
569 'AA64IntrlvReg3P0': vectorRegElem('0'),
570 'AA64IntrlvReg3P1': vectorRegElem('1'),
571 'AA64IntrlvReg3P2': vectorRegElem('2'),
572 'AA64IntrlvReg3P3': vectorRegElem('3'),
573 'AA64IntrlvReg3S': vectorRegElem('0', 'sf', zeroing = True),
574 'AA64IntrlvReg3D': vectorRegElem('0', 'df', zeroing = True),
575 'AA64IntrlvReg3Q': vectorRegElem('0', 'tud', zeroing = True)
576 }),
577
533 'AA64FpDestMerge': vectorReg('dest',
534 {
535 'AA64FpDestMergeP0': vectorRegElem('0'),
536 'AA64FpDestMergeP1': vectorRegElem('1'),
537 'AA64FpDestMergeP2': vectorRegElem('2'),
538 'AA64FpDestMergeP3': vectorRegElem('3'),
539 'AA64FpDestMergeS': vectorRegElem('0', 'sf', zeroing = True),
540 'AA64FpDestMergeD': vectorRegElem('0', 'df', zeroing = True),

--- 118 unchanged lines hidden --- 		578 'AA64FpDestMerge': vectorReg('dest',
579 {
580 'AA64FpDestMergeP0': vectorRegElem('0'),
581 'AA64FpDestMergeP1': vectorRegElem('1'),
582 'AA64FpDestMergeP2': vectorRegElem('2'),
583 'AA64FpDestMergeP3': vectorRegElem('3'),
584 'AA64FpDestMergeS': vectorRegElem('0', 'sf', zeroing = True),
585 'AA64FpDestMergeD': vectorRegElem('0', 'df', zeroing = True),

--- 118 unchanged lines hidden ---