operands.isa (13759:9941fca869a9) | operands.isa (13815:be0ad772ae61) |
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1// -*- mode:c++ -*- 2// Copyright (c) 2010-2014, 2016 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 252 unchanged lines hidden (view full) --- 261 '''((condCode == COND_VS || condCode == COND_VC || 262 condCode == COND_GE || condCode == COND_LT || 263 condCode == COND_GT || condCode == COND_LE) ? 264 CCREG_V : CCREG_ZERO)'''), 265 'FpCondCodes': ccReg('CCREG_FP'), 266 267 #Abstracted floating point reg operands 268 'FpDest': vectorElem('dest / 4', 'dest % 4'), | 1// -*- mode:c++ -*- 2// Copyright (c) 2010-2014, 2016 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 252 unchanged lines hidden (view full) --- 261 '''((condCode == COND_VS || condCode == COND_VC || 262 condCode == COND_GE || condCode == COND_LT || 263 condCode == COND_GT || condCode == COND_LE) ? 264 CCREG_V : CCREG_ZERO)'''), 265 'FpCondCodes': ccReg('CCREG_FP'), 266 267 #Abstracted floating point reg operands 268 'FpDest': vectorElem('dest / 4', 'dest % 4'), |
269 'FpDestP0': vectorElem('dest / 4', '(dest % 4) + 0'), 270 'FpDestP1': vectorElem('dest / 4', '(dest % 4) + 1'), 271 'FpDestP2': vectorElem('dest / 4', '(dest % 4) + 2'), 272 'FpDestP3': vectorElem('dest / 4', '(dest % 4) + 3'), 273 'FpDestP4': vectorElem('(dest / 4) + 1', '(dest % 4) + 0'), 274 'FpDestP5': vectorElem('(dest / 4) + 1', '(dest % 4) + 1'), 275 'FpDestP6': vectorElem('(dest / 4) + 1', '(dest % 4) + 2'), 276 'FpDestP7': vectorElem('(dest / 4) + 1', '(dest % 4) + 3'), | 269 'FpDestP0': vectorElem('(dest + 0) / 4', '(dest + 0) % 4'), 270 'FpDestP1': vectorElem('(dest + 1) / 4', '(dest + 1) % 4'), 271 'FpDestP2': vectorElem('(dest + 2) / 4', '(dest + 2) % 4'), 272 'FpDestP3': vectorElem('(dest + 3) / 4', '(dest + 3) % 4'), 273 'FpDestP4': vectorElem('(dest + 4) / 4', '(dest + 4) % 4'), 274 'FpDestP5': vectorElem('(dest + 5) / 4', '(dest + 5) % 4'), 275 'FpDestP6': vectorElem('(dest + 6) / 4', '(dest + 6) % 4'), 276 'FpDestP7': vectorElem('(dest + 7) / 4', '(dest + 7) % 4'), |
277 278 'FpDestS0P0': vectorElem( 279 '(dest + step * 0 + 0) / 4', '(dest + step * 0 + 0) % 4'), 280 'FpDestS0P1': vectorElem( 281 '(dest + step * 0 + 1) / 4', '(dest + step * 0 + 1) % 4'), 282 'FpDestS1P0': vectorElem( 283 '(dest + step * 1 + 0) / 4', '(dest + step * 1 + 0) % 4'), 284 'FpDestS1P1': vectorElem( 285 '(dest + step * 1 + 1) / 4', '(dest + step * 1 + 1) % 4'), 286 'FpDestS2P0': vectorElem( 287 '(dest + step * 2 + 0) / 4', '(dest + step * 2 + 0) % 4'), 288 'FpDestS2P1': vectorElem( 289 '(dest + step * 2 + 1) / 4', '(dest + step * 2 + 1) % 4'), 290 'FpDestS3P0': vectorElem( 291 '(dest + step * 3 + 0) / 4', '(dest + step * 3 + 0) % 4'), 292 'FpDestS3P1': vectorElem( 293 '(dest + step * 3 + 1) / 4', '(dest + step * 3 + 1) % 4'), 294 295 'FpDest2': vectorElem('dest2 / 4', 'dest2 % 4'), | 277 278 'FpDestS0P0': vectorElem( 279 '(dest + step * 0 + 0) / 4', '(dest + step * 0 + 0) % 4'), 280 'FpDestS0P1': vectorElem( 281 '(dest + step * 0 + 1) / 4', '(dest + step * 0 + 1) % 4'), 282 'FpDestS1P0': vectorElem( 283 '(dest + step * 1 + 0) / 4', '(dest + step * 1 + 0) % 4'), 284 'FpDestS1P1': vectorElem( 285 '(dest + step * 1 + 1) / 4', '(dest + step * 1 + 1) % 4'), 286 'FpDestS2P0': vectorElem( 287 '(dest + step * 2 + 0) / 4', '(dest + step * 2 + 0) % 4'), 288 'FpDestS2P1': vectorElem( 289 '(dest + step * 2 + 1) / 4', '(dest + step * 2 + 1) % 4'), 290 'FpDestS3P0': vectorElem( 291 '(dest + step * 3 + 0) / 4', '(dest + step * 3 + 0) % 4'), 292 'FpDestS3P1': vectorElem( 293 '(dest + step * 3 + 1) / 4', '(dest + step * 3 + 1) % 4'), 294 295 'FpDest2': vectorElem('dest2 / 4', 'dest2 % 4'), |
296 'FpDest2P0': vectorElem('dest2 / 4', '(dest2 % 4) + 0'), 297 'FpDest2P1': vectorElem('dest2 / 4', '(dest2 % 4) + 1'), 298 'FpDest2P2': vectorElem('dest2 / 4', '(dest2 % 4) + 2'), 299 'FpDest2P3': vectorElem('dest2 / 4', '(dest2 % 4) + 3'), | 296 'FpDest2P0': vectorElem('(dest2 + 0) / 4', '(dest2 + 0) % 4'), 297 'FpDest2P1': vectorElem('(dest2 + 1) / 4', '(dest2 + 1) % 4'), 298 'FpDest2P2': vectorElem('(dest2 + 2) / 4', '(dest2 + 2) % 4'), 299 'FpDest2P3': vectorElem('(dest2 + 3) / 4', '(dest2 + 3) % 4'), |
300 301 'FpOp1': vectorElem('op1 / 4', 'op1 % 4'), | 300 301 'FpOp1': vectorElem('op1 / 4', 'op1 % 4'), |
302 'FpOp1P0': vectorElem('op1 / 4', '(op1 % 4) + 0'), 303 'FpOp1P1': vectorElem('op1 / 4', '(op1 % 4) + 1'), 304 'FpOp1P2': vectorElem('op1 / 4', '(op1 % 4) + 2'), 305 'FpOp1P3': vectorElem('op1 / 4', '(op1 % 4) + 3'), 306 'FpOp1P4': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 0'), 307 'FpOp1P5': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 1'), 308 'FpOp1P6': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 2'), 309 'FpOp1P7': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 3'), | 302 'FpOp1P0': vectorElem('(op1 + 0) / 4', '(op1 + 0) % 4'), 303 'FpOp1P1': vectorElem('(op1 + 1) / 4', '(op1 + 1) % 4'), 304 'FpOp1P2': vectorElem('(op1 + 2) / 4', '(op1 + 2) % 4'), 305 'FpOp1P3': vectorElem('(op1 + 3) / 4', '(op1 + 3) % 4'), 306 'FpOp1P4': vectorElem('(op1 + 4) / 4', '(op1 + 4) % 4'), 307 'FpOp1P5': vectorElem('(op1 + 5) / 4', '(op1 + 5) % 4'), 308 'FpOp1P6': vectorElem('(op1 + 6) / 4', '(op1 + 6) % 4'), 309 'FpOp1P7': vectorElem('(op1 + 7) / 4', '(op1 + 7) % 4'), |
310 311 'FpOp1S0P0': vectorElem( 312 '(op1 + step * 0 + 0) / 4', '(op1 + step * 0 + 0) % 4'), 313 'FpOp1S0P1': vectorElem( 314 '(op1 + step * 0 + 1) / 4', '(op1 + step * 0 + 1) % 4'), 315 'FpOp1S1P0': vectorElem( 316 '(op1 + step * 1 + 0) / 4', '(op1 + step * 1 + 0) % 4'), 317 'FpOp1S1P1': vectorElem( 318 '(op1 + step * 1 + 1) / 4', '(op1 + step * 1 + 1) % 4'), 319 'FpOp1S2P0': vectorElem( 320 '(op1 + step * 2 + 0) / 4', '(op1 + step * 2 + 0) % 4'), 321 'FpOp1S2P1': vectorElem( 322 '(op1 + step * 2 + 1) / 4', '(op1 + step * 2 + 1) % 4'), 323 'FpOp1S3P0': vectorElem( 324 '(op1 + step * 3 + 0) / 4', '(op1 + step * 3 + 0) % 4'), 325 'FpOp1S3P1': vectorElem( 326 '(op1 + step * 3 + 1) / 4', '(op1 + step * 3 + 1) % 4'), 327 328 'FpOp2': vectorElem('op2 / 4', 'op2 % 4'), | 310 311 'FpOp1S0P0': vectorElem( 312 '(op1 + step * 0 + 0) / 4', '(op1 + step * 0 + 0) % 4'), 313 'FpOp1S0P1': vectorElem( 314 '(op1 + step * 0 + 1) / 4', '(op1 + step * 0 + 1) % 4'), 315 'FpOp1S1P0': vectorElem( 316 '(op1 + step * 1 + 0) / 4', '(op1 + step * 1 + 0) % 4'), 317 'FpOp1S1P1': vectorElem( 318 '(op1 + step * 1 + 1) / 4', '(op1 + step * 1 + 1) % 4'), 319 'FpOp1S2P0': vectorElem( 320 '(op1 + step * 2 + 0) / 4', '(op1 + step * 2 + 0) % 4'), 321 'FpOp1S2P1': vectorElem( 322 '(op1 + step * 2 + 1) / 4', '(op1 + step * 2 + 1) % 4'), 323 'FpOp1S3P0': vectorElem( 324 '(op1 + step * 3 + 0) / 4', '(op1 + step * 3 + 0) % 4'), 325 'FpOp1S3P1': vectorElem( 326 '(op1 + step * 3 + 1) / 4', '(op1 + step * 3 + 1) % 4'), 327 328 'FpOp2': vectorElem('op2 / 4', 'op2 % 4'), |
329 'FpOp2P0': vectorElem('op2 / 4', '(op2 % 4) + 0'), 330 'FpOp2P1': vectorElem('op2 / 4', '(op2 % 4) + 1'), 331 'FpOp2P2': vectorElem('op2 / 4', '(op2 % 4) + 2'), 332 'FpOp2P3': vectorElem('op2 / 4', '(op2 % 4) + 3'), | 329 'FpOp2P0': vectorElem('(op2 + 0) / 4', '(op2 + 0) % 4'), 330 'FpOp2P1': vectorElem('(op2 + 1) / 4', '(op2 + 1) % 4'), 331 'FpOp2P2': vectorElem('(op2 + 2) / 4', '(op2 + 2) % 4'), 332 'FpOp2P3': vectorElem('(op2 + 3) / 4', '(op2 + 3) % 4'), |
333 334 # Create AArch64 unpacked view of the FP registers 335 # Name ::= 'AA64Vec' OpSpec [LaneSpec] 336 # OpSpec ::= IOSpec [Index] [Plus] 337 # IOSpec ::= 'S' | 'D' 338 # Index ::= '0' | ... | '9' 339 # Plus ::= [PlusAmount] ['l'] 340 # PlusAmount ::= 'p' [PlusAmount] --- 283 unchanged lines hidden --- | 333 334 # Create AArch64 unpacked view of the FP registers 335 # Name ::= 'AA64Vec' OpSpec [LaneSpec] 336 # OpSpec ::= IOSpec [Index] [Plus] 337 # IOSpec ::= 'S' | 'D' 338 # Index ::= '0' | ... | '9' 339 # Plus ::= [PlusAmount] ['l'] 340 # PlusAmount ::= 'p' [PlusAmount] --- 283 unchanged lines hidden --- |