| operands.isa (12134:604f47f63877) | operands.isa (12386:2bf5fb25a5f1) |
|---|---|
| 1// -*- mode:c++ -*- 2// Copyright (c) 2010-2014, 2016 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 33 unchanged lines hidden (view full) --- 42def operand_types {{ 43 'sb' : 'int8_t', 44 'ub' : 'uint8_t', 45 'sh' : 'int16_t', 46 'uh' : 'uint16_t', 47 'sw' : 'int32_t', 48 'uw' : 'uint32_t', 49 'ud' : 'uint64_t', | 1// -*- mode:c++ -*- 2// Copyright (c) 2010-2014, 2016 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 33 unchanged lines hidden (view full) --- 42def operand_types {{ 43 'sb' : 'int8_t', 44 'ub' : 'uint8_t', 45 'sh' : 'int16_t', 46 'uh' : 'uint16_t', 47 'sw' : 'int32_t', 48 'uw' : 'uint32_t', 49 'ud' : 'uint64_t', |
| 50 'tud' : 'Twin64_t', | 50 'tud' : 'std::array<uint64_t, 2>', |
| 51 'sf' : 'float', 52 'df' : 'double', 53 'vc' : 'TheISA::VecRegContainer', 54 # For operations that are implemented as a template 55 'x' : 'TPElem', 56}}; 57 58let {{ --- 525 unchanged lines hidden --- | 51 'sf' : 'float', 52 'df' : 'double', 53 'vc' : 'TheISA::VecRegContainer', 54 # For operations that are implemented as a template 55 'x' : 'TPElem', 56}}; 57 58let {{ --- 525 unchanged lines hidden --- |