91a92,99
> 'Reg0': ('IntReg', 'uw', 'reg0', 'IsInteger', 6,
> maybePCRead, maybePCWrite),
> 'Reg1': ('IntReg', 'uw', 'reg1', 'IsInteger', 7,
> maybePCRead, maybePCWrite),
> 'Reg2': ('IntReg', 'uw', 'reg2', 'IsInteger', 8,
> maybePCRead, maybePCWrite),
> 'Reg3': ('IntReg', 'uw', 'reg3', 'IsInteger', 9,
> maybePCRead, maybePCWrite),