1// -*- mode:c++ -*-
2// Copyright (c) 2010 ARM Limited
3// All rights reserved
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

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71def operands {{
72 #Abstracted integer reg operands
73 'Dest': ('IntReg', 'uw', 'dest', 'IsInteger', 0,
74 maybePCRead, maybePCWrite),
75 'Base': ('IntReg', 'uw', 'base', 'IsInteger', 1,
76 maybePCRead, maybePCWrite),
77 'Index': ('IntReg', 'uw', 'index', 'IsInteger', 2,
78 maybePCRead, maybePCWrite),
79 #General Purpose Integer Reg Operands
80 'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1, maybePCRead, maybePCWrite),
81 'Rm': ('IntReg', 'uw', 'RM', 'IsInteger', 2, maybePCRead, maybePCWrite),
82 'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 3, maybePCRead, maybePCWrite),
83 'Rn': ('IntReg', 'uw', 'RN', 'IsInteger', 4, maybePCRead, maybePCWrite),
84 'R7': ('IntReg', 'uw', '7', 'IsInteger', 5),
85 'R0': ('IntReg', 'uw', '0', 'IsInteger', 0),
86

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