sve_mem.isa (14108:881e7d85baf7) sve_mem.isa (14110:1bf991299609)
1// Copyright (c) 2017-2018 ARM Limited
1// Copyright (c) 2017-2019 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated

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1112 # operations (gather loads, scatter stores)
1113 def emitSveIndexedMemMicroops(indexed_addr_form):
1114 assert indexed_addr_form in (IndexedAddrForm.VEC_PLUS_IMM,
1115 IndexedAddrForm.SCA_PLUS_VEC)
1116 global header_output, exec_output, decoders
1117 tplHeader = 'template <class RegElemType, class MemElemType>'
1118 tplArgs = '<RegElemType, MemElemType>'
1119 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM:
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated

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1112 # operations (gather loads, scatter stores)
1113 def emitSveIndexedMemMicroops(indexed_addr_form):
1114 assert indexed_addr_form in (IndexedAddrForm.VEC_PLUS_IMM,
1115 IndexedAddrForm.SCA_PLUS_VEC)
1116 global header_output, exec_output, decoders
1117 tplHeader = 'template <class RegElemType, class MemElemType>'
1118 tplArgs = '<RegElemType, MemElemType>'
1119 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM:
1120 eaCode = '''
1120 eaCode_store = '''
1121 EA = AA64FpBase_x[elemIndex] + imm * sizeof(MemElemType)'''
1121 EA = AA64FpBase_x[elemIndex] + imm * sizeof(MemElemType)'''
1122 eaCode_load = '''
1123 EA = AA64FpUreg0_x[elemIndex] + imm * sizeof(MemElemType)'''
1122 else:
1124 else:
1123 eaCode = '''
1124 uint64_t offset = AA64FpOffset_x[elemIndex];
1125 offset_code = '''
1125 if (offsetIs32) {
1126 offset &= (1ULL << 32) - 1;
1127 }
1128 if (offsetIsSigned) {
1129 offset = sext<32>(offset);
1130 }
1131 if (offsetIsScaled) {
1132 offset *= sizeof(MemElemType);
1133 }
1134 EA = XBase + offset'''
1126 if (offsetIs32) {
1127 offset &= (1ULL << 32) - 1;
1128 }
1129 if (offsetIsSigned) {
1130 offset = sext<32>(offset);
1131 }
1132 if (offsetIsScaled) {
1133 offset *= sizeof(MemElemType);
1134 }
1135 EA = XBase + offset'''
1136 eaCode_store = '''
1137 uint64_t offset = AA64FpOffset_x[elemIndex];''' + offset_code
1138 eaCode_load = '''
1139 uint64_t offset = AA64FpUreg0_x[elemIndex];''' + offset_code
1140
1135 loadMemAccCode = '''
1136 AA64FpDest_x[elemIndex] = memData;
1137 '''
1138 storeMemAccCode = '''
1139 memData = AA64FpDest_x[elemIndex];
1140 '''
1141 predCheckCode = 'GpOp_x[index]'
1142 faultStatusSetCode = 'PUreg0_x[elemIndex] = 1;'
1143 faultStatusResetCode = 'PUreg0_x[elemIndex] = 0;'
1144 loadIop = InstObjParams('ld1',
1145 ('SveGatherLoadVIMicroop'
1146 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM
1147 else 'SveGatherLoadSVMicroop'),
1148 'MicroOp',
1149 {'tpl_header': tplHeader,
1150 'tpl_args': tplArgs,
1151 'memacc_code': loadMemAccCode,
1141 loadMemAccCode = '''
1142 AA64FpDest_x[elemIndex] = memData;
1143 '''
1144 storeMemAccCode = '''
1145 memData = AA64FpDest_x[elemIndex];
1146 '''
1147 predCheckCode = 'GpOp_x[index]'
1148 faultStatusSetCode = 'PUreg0_x[elemIndex] = 1;'
1149 faultStatusResetCode = 'PUreg0_x[elemIndex] = 0;'
1150 loadIop = InstObjParams('ld1',
1151 ('SveGatherLoadVIMicroop'
1152 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM
1153 else 'SveGatherLoadSVMicroop'),
1154 'MicroOp',
1155 {'tpl_header': tplHeader,
1156 'tpl_args': tplArgs,
1157 'memacc_code': loadMemAccCode,
1152 'ea_code' : sveEnabledCheckCode + eaCode,
1158 'ea_code' : sveEnabledCheckCode + eaCode_load,
1153 'fault_status_set_code' : faultStatusSetCode,
1154 'fault_status_reset_code' : faultStatusResetCode,
1155 'pred_check_code' : predCheckCode,
1156 'fa_code' : ''},
1157 ['IsMicroop', 'IsMemRef', 'IsLoad'])
1158 storeIop = InstObjParams('st1',
1159 ('SveScatterStoreVIMicroop'
1160 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM
1161 else 'SveScatterStoreSVMicroop'),
1162 'MicroOp',
1163 {'tpl_header': tplHeader,
1164 'tpl_args': tplArgs,
1165 'memacc_code': storeMemAccCode,
1159 'fault_status_set_code' : faultStatusSetCode,
1160 'fault_status_reset_code' : faultStatusResetCode,
1161 'pred_check_code' : predCheckCode,
1162 'fa_code' : ''},
1163 ['IsMicroop', 'IsMemRef', 'IsLoad'])
1164 storeIop = InstObjParams('st1',
1165 ('SveScatterStoreVIMicroop'
1166 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM
1167 else 'SveScatterStoreSVMicroop'),
1168 'MicroOp',
1169 {'tpl_header': tplHeader,
1170 'tpl_args': tplArgs,
1171 'memacc_code': storeMemAccCode,
1166 'ea_code' : sveEnabledCheckCode + eaCode,
1172 'ea_code' : sveEnabledCheckCode + eaCode_store,
1167 'pred_check_code' : predCheckCode,
1168 'fa_code' : ''},
1169 ['IsMicroop', 'IsMemRef', 'IsStore'])
1170 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM:
1171 header_output += SveIndexedMemVIMicroopDeclare.subst(loadIop)
1172 header_output += SveIndexedMemVIMicroopDeclare.subst(storeIop)
1173 else:
1174 header_output += SveIndexedMemSVMicroopDeclare.subst(loadIop)

--- 415 unchanged lines hidden --- 		1173 'pred_check_code' : predCheckCode,
1174 'fa_code' : ''},
1175 ['IsMicroop', 'IsMemRef', 'IsStore'])
1176 if indexed_addr_form == IndexedAddrForm.VEC_PLUS_IMM:
1177 header_output += SveIndexedMemVIMicroopDeclare.subst(loadIop)
1178 header_output += SveIndexedMemVIMicroopDeclare.subst(storeIop)
1179 else:
1180 header_output += SveIndexedMemSVMicroopDeclare.subst(loadIop)

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