| str64.isa (12219:5c42cf79d862) | str64.isa (12386:2bf5fb25a5f1) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2011-2013,2017 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 212 unchanged lines hidden (view full) --- 221 uint64_t data = XDest2_uw; 222 data = (data << 32) | XDest_uw; 223 Mem_ud = cSwap(data, isBigEndian64(xc->tcBase())); 224 ''' 225 elif self.size == 8: 226 accCode = ''' 227 // This temporary needs to be here so that the parser 228 // will correctly identify this instruction as a store. | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2011-2013,2017 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 212 unchanged lines hidden (view full) --- 221 uint64_t data = XDest2_uw; 222 data = (data << 32) | XDest_uw; 223 Mem_ud = cSwap(data, isBigEndian64(xc->tcBase())); 224 ''' 225 elif self.size == 8: 226 accCode = ''' 227 // This temporary needs to be here so that the parser 228 // will correctly identify this instruction as a store. |
| 229 Twin64_t temp; 230 temp.a = XDest_ud; 231 temp.b = XDest2_ud; | 229 std::array<uint64_t, 2> temp; 230 temp[0] = XDest_ud; 231 temp[1] = XDest2_ud; |
| 232 Mem_tud = temp; 233 ''' 234 self.codeBlobs["memacc_code"] = accCode 235 236 # Push it out to the output files 237 wbDecl = None 238 if self.writeback and not self.micro: 239 wbDecl = self.wbDecl --- 135 unchanged lines hidden --- | 232 Mem_tud = temp; 233 ''' 234 self.codeBlobs["memacc_code"] = accCode 235 236 # Push it out to the output files 237 wbDecl = None 238 if self.writeback and not self.micro: 239 wbDecl = self.wbDecl --- 135 unchanged lines hidden --- |