mult.isa (7760:e93e7e0caae1) mult.isa (8206:c3090dc00ddf)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 335 unchanged lines hidden (view full) ---

344 sext<16>(bits(Reg2, 15, 0));
345 ''')
346 buildMult3InstUnCc("smultt", '''Reg0 = resTemp =
347 sext<16>(bits(Reg1, 31, 16)) *
348 sext<16>(bits(Reg2, 31, 16));
349 ''')
350 buildMult4Inst ("smull", '''resTemp = (int64_t)Reg2.sw *
351 (int64_t)Reg3.sw;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 335 unchanged lines hidden (view full) ---

344 sext<16>(bits(Reg2, 15, 0));
345 ''')
346 buildMult3InstUnCc("smultt", '''Reg0 = resTemp =
347 sext<16>(bits(Reg1, 31, 16)) *
348 sext<16>(bits(Reg2, 31, 16));
349 ''')
350 buildMult4Inst ("smull", '''resTemp = (int64_t)Reg2.sw *
351 (int64_t)Reg3.sw;
352 Reg0 = (int32_t)resTemp;
353 Reg1 = (int32_t)(resTemp >> 32);
352 Reg1 = (int32_t)(resTemp >> 32);
353 Reg0 = (int32_t)resTemp;
354 ''', "llbit")
355 buildMult3InstUnCc("smulwb", '''Reg0 = resTemp =
356 (Reg1.sw *
357 sext<16>(bits(Reg2, 15, 0))) >> 16;
358 ''')
359 buildMult3InstUnCc("smulwt", '''Reg0 = resTemp =
360 (Reg1.sw *
361 sext<16>(bits(Reg2, 31, 16))) >> 16;

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369 buildMult3InstUnCc("smusdx", '''Reg0 = resTemp =
370 sext<16>(bits(Reg1, 15, 0)) *
371 sext<16>(bits(Reg2, 31, 16)) -
372 sext<16>(bits(Reg1, 31, 16)) *
373 sext<16>(bits(Reg2, 15, 0));
374 ''')
375 buildMult4InstUnCc("umaal", '''resTemp = Reg2.ud * Reg3.ud +
376 Reg0.ud + Reg1.ud;
354 ''', "llbit")
355 buildMult3InstUnCc("smulwb", '''Reg0 = resTemp =
356 (Reg1.sw *
357 sext<16>(bits(Reg2, 15, 0))) >> 16;
358 ''')
359 buildMult3InstUnCc("smulwt", '''Reg0 = resTemp =
360 (Reg1.sw *
361 sext<16>(bits(Reg2, 31, 16))) >> 16;

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369 buildMult3InstUnCc("smusdx", '''Reg0 = resTemp =
370 sext<16>(bits(Reg1, 15, 0)) *
371 sext<16>(bits(Reg2, 31, 16)) -
372 sext<16>(bits(Reg1, 31, 16)) *
373 sext<16>(bits(Reg2, 15, 0));
374 ''')
375 buildMult4InstUnCc("umaal", '''resTemp = Reg2.ud * Reg3.ud +
376 Reg0.ud + Reg1.ud;
377 Reg0.ud = (uint32_t)resTemp;
378 Reg1.ud = (uint32_t)(resTemp >> 32);
377 Reg1.ud = (uint32_t)(resTemp >> 32);
378 Reg0.ud = (uint32_t)resTemp;
379 ''')
380 buildMult4Inst ("umlal", '''resTemp = Reg2.ud * Reg3.ud + Reg0.ud +
381 (Reg1.ud << 32);
379 ''')
380 buildMult4Inst ("umlal", '''resTemp = Reg2.ud * Reg3.ud + Reg0.ud +
381 (Reg1.ud << 32);
382 Reg0.ud = (uint32_t)resTemp;
383 Reg1.ud = (uint32_t)(resTemp >> 32);
382 Reg1.ud = (uint32_t)(resTemp >> 32);
383 Reg0.ud = (uint32_t)resTemp;
384 ''', "llbit")
385 buildMult4Inst ("umull", '''resTemp = Reg2.ud * Reg3.ud;
384 ''', "llbit")
385 buildMult4Inst ("umull", '''resTemp = Reg2.ud * Reg3.ud;
386 Reg0 = (uint32_t)resTemp;
387 Reg1 = (uint32_t)(resTemp >> 32);
386 Reg1 = (uint32_t)(resTemp >> 32);
387 Reg0 = (uint32_t)resTemp;
388 ''', "llbit")
389}};
388 ''', "llbit")
389}};