47,48c47
< cprintf("canOverflow: %%d\\n", Reg0 < resTemp);
< replaceBits(CondCodes, 27, Reg0 < resTemp);
---
> CondCodes = CondCodes | ((resTemp & 1) << 27);
137c136
< sext<16>(bits(Reg2, 15, 0)) +
---
> sext<16>(bits(Reg2.sw, 15, 0)) +
138a138,139
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
142c143
< sext<16>(bits(Reg2, 31, 16)) +
---
> sext<16>(bits(Reg2.sw, 31, 16)) +
143a145,146
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
147c150
< sext<16>(bits(Reg2, 15, 0)) +
---
> sext<16>(bits(Reg2.sw, 15, 0)) +
148a152,153
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
152c157
< sext<16>(bits(Reg2, 31, 16)) +
---
> sext<16>(bits(Reg2.sw, 31, 16)) +
153a159,160
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
225c232,234
< (Reg3.sw << 16)) >> 16;
---
> ((int64_t)Reg3.sw << 16)) >> 16;
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
230c239,241
< (Reg3.sw << 16)) >> 16;
---
> ((int64_t)Reg3.sw << 16)) >> 16;
> resTemp = bits(resTemp, 32) !=
> bits(resTemp, 31);
310,313d320
< sext<16>(bits(Reg1, 31, 16)) *
< sext<16>(bits(Reg2, 15, 0));
< ''')
< buildMult3InstUnCc("smultb", '''Reg0 = resTemp =
316a324,327
> buildMult3InstUnCc("smultb", '''Reg0 = resTemp =
> sext<16>(bits(Reg1, 31, 16)) *
> sext<16>(bits(Reg2, 15, 0));
> ''')
321c332,333
< buildMult4Inst ("smull", '''resTemp = Reg2.sw * Reg3.sw;
---
> buildMult4Inst ("smull", '''resTemp = (int64_t)Reg2.sw *
> (int64_t)Reg3.sw;