misc64.isa (12531:3141027bd11a) misc64.isa (12538:001ad6b1e592)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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37//
38// Authors: Gabe Black
39
40let {{
41 svcCode = '''
42 fault = std::make_shared<SupervisorCall>(machInst, bits(machInst, 20, 5));
43 '''
44
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 28 unchanged lines hidden (view full) ---

37//
38// Authors: Gabe Black
39
40let {{
41 svcCode = '''
42 fault = std::make_shared<SupervisorCall>(machInst, bits(machInst, 20, 5));
43 '''
44
45 svcIop = InstObjParams("svc", "Svc64", "ArmStaticInst",
45 svcIop = InstObjParams("svc", "Svc64", "ImmOp64",
46 svcCode, ["IsSyscall", "IsNonSpeculative",
47 "IsSerializeAfter"])
46 svcCode, ["IsSyscall", "IsNonSpeculative",
47 "IsSerializeAfter"])
48 header_output = BasicDeclare.subst(svcIop)
49 decoder_output = BasicConstructor64.subst(svcIop)
48 header_output = ImmOp64Declare.subst(svcIop)
49 decoder_output = ImmOp64Constructor.subst(svcIop)
50 exec_output = BasicExecute.subst(svcIop)
51
52 hvcCode = '''
53 SCR scr = Scr64;
54
55 if (!ArmSystem::haveVirtualization(xc->tcBase()) ||
56 (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) {
57 fault = disabledFault();
58 } else {
59 fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5));
60 }
61 '''
62
50 exec_output = BasicExecute.subst(svcIop)
51
52 hvcCode = '''
53 SCR scr = Scr64;
54
55 if (!ArmSystem::haveVirtualization(xc->tcBase()) ||
56 (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) {
57 fault = disabledFault();
58 } else {
59 fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5));
60 }
61 '''
62
63 hvcIop = InstObjParams("hvc", "Hvc64", "ArmStaticInst",
63 hvcIop = InstObjParams("hvc", "Hvc64", "ImmOp64",
64 hvcCode, ["IsSyscall", "IsNonSpeculative",
65 "IsSerializeAfter"])
64 hvcCode, ["IsSyscall", "IsNonSpeculative",
65 "IsSerializeAfter"])
66 header_output += BasicDeclare.subst(hvcIop)
67 decoder_output += BasicConstructor64.subst(hvcIop)
66 header_output += ImmOp64Declare.subst(hvcIop)
67 decoder_output += ImmOp64Constructor.subst(hvcIop)
68 exec_output += BasicExecute.subst(hvcIop)
69
70 # @todo: extend to take into account Virtualization.
71 smcCode = '''
72 SCR scr = Scr64;
73 CPSR cpsr = Cpsr;
74
75 if (!ArmSystem::haveSecurity(xc->tcBase()) || inUserMode(cpsr) || scr.smd) {
76 fault = disabledFault();
77 } else {
78 fault = std::make_shared<SecureMonitorCall>(machInst);
79 }
80 '''
81
68 exec_output += BasicExecute.subst(hvcIop)
69
70 # @todo: extend to take into account Virtualization.
71 smcCode = '''
72 SCR scr = Scr64;
73 CPSR cpsr = Cpsr;
74
75 if (!ArmSystem::haveSecurity(xc->tcBase()) || inUserMode(cpsr) || scr.smd) {
76 fault = disabledFault();
77 } else {
78 fault = std::make_shared<SecureMonitorCall>(machInst);
79 }
80 '''
81
82 smcIop = InstObjParams("smc", "Smc64", "ArmStaticInst",
82 smcIop = InstObjParams("smc", "Smc64", "ImmOp64",
83 smcCode, ["IsNonSpeculative", "IsSerializeAfter"])
83 smcCode, ["IsNonSpeculative", "IsSerializeAfter"])
84 header_output += BasicDeclare.subst(smcIop)
85 decoder_output += BasicConstructor64.subst(smcIop)
84 header_output += ImmOp64Declare.subst(smcIop)
85 decoder_output += ImmOp64Constructor.subst(smcIop)
86 exec_output += BasicExecute.subst(smcIop)
87
88 def subst(templateBase, iop):
89 global header_output, decoder_output, exec_output
90 header_output += eval(templateBase + "Declare").subst(iop)
91 decoder_output += eval(templateBase + "Constructor").subst(iop)
92 exec_output += BasicExecute.subst(iop)
93

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164 exec_output += BasicExecute.subst(clrexIop)
165
166
167 brkCode = '''
168 fault = std::make_shared<SoftwareBreakpoint>(machInst,
169 bits(machInst, 20, 5));
170 '''
171
86 exec_output += BasicExecute.subst(smcIop)
87
88 def subst(templateBase, iop):
89 global header_output, decoder_output, exec_output
90 header_output += eval(templateBase + "Declare").subst(iop)
91 decoder_output += eval(templateBase + "Constructor").subst(iop)
92 exec_output += BasicExecute.subst(iop)
93

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164 exec_output += BasicExecute.subst(clrexIop)
165
166
167 brkCode = '''
168 fault = std::make_shared<SoftwareBreakpoint>(machInst,
169 bits(machInst, 20, 5));
170 '''
171
172 brkIop = InstObjParams("brk", "Brk64", "ArmStaticInst",
172 brkIop = InstObjParams("brk", "Brk64", "ImmOp64",
173 brkCode, ["IsSerializeAfter"])
173 brkCode, ["IsSerializeAfter"])
174 header_output += BasicDeclare.subst(brkIop)
175 decoder_output += BasicConstructor64.subst(brkIop)
174 header_output += ImmOp64Declare.subst(brkIop)
175 decoder_output += ImmOp64Constructor.subst(brkIop)
176 exec_output += BasicExecute.subst(brkIop)
177
178 hltCode = '''
179 ThreadContext *tc = xc->tcBase();
180 if (ArmSystem::haveSemihosting(tc) && bits(machInst, 20, 5) == 0xF000) {
181 X0 = ArmSystem::callSemihosting64(tc, X0 & mask(32), X1);
182 } else {
183 // HLT instructions aren't implemented, so treat them as undefined
184 // instructions.
185 fault = std::make_shared<UndefinedInstruction>(
186 machInst, false, mnemonic);
187 }
188
189 '''
190
176 exec_output += BasicExecute.subst(brkIop)
177
178 hltCode = '''
179 ThreadContext *tc = xc->tcBase();
180 if (ArmSystem::haveSemihosting(tc) && bits(machInst, 20, 5) == 0xF000) {
181 X0 = ArmSystem::callSemihosting64(tc, X0 & mask(32), X1);
182 } else {
183 // HLT instructions aren't implemented, so treat them as undefined
184 // instructions.
185 fault = std::make_shared<UndefinedInstruction>(
186 machInst, false, mnemonic);
187 }
188
189 '''
190
191 hltIop = InstObjParams("hlt", "Hlt64", "ArmStaticInst",
191 hltIop = InstObjParams("hlt", "Hlt64", "ImmOp64",
192 hltCode, ["IsNonSpeculative"])
192 hltCode, ["IsNonSpeculative"])
193 header_output += BasicDeclare.subst(hltIop)
194 decoder_output += BasicConstructor64.subst(hltIop)
193 header_output += ImmOp64Declare.subst(hltIop)
194 decoder_output += ImmOp64Constructor.subst(hltIop)
195 exec_output += BasicExecute.subst(hltIop)
196}};
195 exec_output += BasicExecute.subst(hltIop)
196}};