misc64.isa (12261:88f4f45ec80c) | misc64.isa (12298:9b2520600727) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2011-2013, 2016 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 39 unchanged lines hidden (view full) --- 48 header_output = BasicDeclare.subst(svcIop) 49 decoder_output = BasicConstructor64.subst(svcIop) 50 exec_output = BasicExecute.subst(svcIop) 51 52 hvcCode = ''' 53 SCR scr = Scr64; 54 55 if (!ArmSystem::haveVirtualization(xc->tcBase()) || | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2011-2013, 2016 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 39 unchanged lines hidden (view full) --- 48 header_output = BasicDeclare.subst(svcIop) 49 decoder_output = BasicConstructor64.subst(svcIop) 50 exec_output = BasicExecute.subst(svcIop) 51 52 hvcCode = ''' 53 SCR scr = Scr64; 54 55 if (!ArmSystem::haveVirtualization(xc->tcBase()) || |
56 (ArmSystem::haveSecurity(xc->tcBase()) && !scr.hce)) { | 56 (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) { |
57 fault = disabledFault(); 58 } else { 59 fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5)); 60 } 61 ''' 62 63 hvcIop = InstObjParams("hvc", "Hvc64", "ArmStaticInst", 64 hvcCode, ["IsSyscall", "IsNonSpeculative", --- 101 unchanged lines hidden --- | 57 fault = disabledFault(); 58 } else { 59 fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5)); 60 } 61 ''' 62 63 hvcIop = InstObjParams("hvc", "Hvc64", "ArmStaticInst", 64 hvcCode, ["IsSyscall", "IsNonSpeculative", --- 101 unchanged lines hidden --- |