misc.isa (8809:bb10807da889) misc.isa (8868:26dbd171754e)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
3// Copyright (c) 2010-2012 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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621 '''
622 bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp",
623 { "code": bfiCode,
624 "predicate_test": predicateTest }, [])
625 header_output += RegRegImmImmOpDeclare.subst(bfiIop)
626 decoder_output += RegRegImmImmOpConstructor.subst(bfiIop)
627 exec_output += PredOpExecute.subst(bfiIop)
628
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

--- 609 unchanged lines hidden (view full) ---

621 '''
622 bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp",
623 { "code": bfiCode,
624 "predicate_test": predicateTest }, [])
625 header_output += RegRegImmImmOpDeclare.subst(bfiIop)
626 decoder_output += RegRegImmImmOpConstructor.subst(bfiIop)
627 exec_output += PredOpExecute.subst(bfiIop)
628
629 mrc14code = '''
630 CPSR cpsr = Cpsr;
631 if (cpsr.mode == MODE_USER) {
632 if (FullSystem)
633 return new UndefinedInstruction;
634 else
635 return new UndefinedInstruction(false, mnemonic);
636 }
637 Dest = MiscOp1;
638 '''
639
640 mrc14Iop = InstObjParams("mrc", "Mrc14", "RegRegOp",
641 { "code": mrc14code,
642 "predicate_test": predicateTest }, [])
643 header_output += RegRegOpDeclare.subst(mrc14Iop)
644 decoder_output += RegRegOpConstructor.subst(mrc14Iop)
645 exec_output += PredOpExecute.subst(mrc14Iop)
646
647
648 mcr14code = '''
649 CPSR cpsr = Cpsr;
650 if (cpsr.mode == MODE_USER) {
651 if (FullSystem)
652 return new UndefinedInstruction;
653 else
654 return new UndefinedInstruction(false, mnemonic);
655 }
656 MiscDest = Op1;
657 '''
658 mcr14Iop = InstObjParams("mcr", "Mcr14", "RegRegOp",
659 { "code": mcr14code,
660 "predicate_test": predicateTest },
661 ["IsSerializeAfter","IsNonSpeculative"])
662 header_output += RegRegOpDeclare.subst(mcr14Iop)
663 decoder_output += RegRegOpConstructor.subst(mcr14Iop)
664 exec_output += PredOpExecute.subst(mcr14Iop)
665
666 mrc14UserIop = InstObjParams("mrc", "Mrc14User", "RegRegOp",
667 { "code": "Dest = MiscOp1;",
668 "predicate_test": predicateTest }, [])
669 header_output += RegRegOpDeclare.subst(mrc14UserIop)
670 decoder_output += RegRegOpConstructor.subst(mrc14UserIop)
671 exec_output += PredOpExecute.subst(mrc14UserIop)
672
673 mcr14UserIop = InstObjParams("mcr", "Mcr14User", "RegRegOp",
674 { "code": "MiscDest = Op1",
675 "predicate_test": predicateTest },
676 ["IsSerializeAfter","IsNonSpeculative"])
677 header_output += RegRegOpDeclare.subst(mcr14UserIop)
678 decoder_output += RegRegOpConstructor.subst(mcr14UserIop)
679 exec_output += PredOpExecute.subst(mcr14UserIop)
680
629 mrc15code = '''
630 CPSR cpsr = Cpsr;
631 if (cpsr.mode == MODE_USER) {
632 if (FullSystem)
633 return new UndefinedInstruction;
634 else
635 return new UndefinedInstruction(false, mnemonic);
636 }

--- 163 unchanged lines hidden --- 		681 mrc15code = '''
682 CPSR cpsr = Cpsr;
683 if (cpsr.mode == MODE_USER) {
684 if (FullSystem)
685 return new UndefinedInstruction;
686 else
687 return new UndefinedInstruction(false, mnemonic);
688 }

--- 163 unchanged lines hidden ---