misc.isa (8302:9f23d01421de) misc.isa (8303:5a95f1d2494e)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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56
57}};
58
59let {{
60
61 header_output = decoder_output = exec_output = ""
62
63 mrsCpsrCode = '''
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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56
57}};
58
59let {{
60
61 header_output = decoder_output = exec_output = ""
62
63 mrsCpsrCode = '''
64 Dest = (Cpsr | CondCodesF | CondCodesGE) & 0xF8FF03DF
64 CPSR cpsr = Cpsr;
65 cpsr.nz = CondCodesNZ;
66 cpsr.c = CondCodesC;
67 cpsr.v = CondCodesV;
68 cpsr.ge = CondCodesGE;
69 Dest = cpsr & 0xF8FF03DF
65 '''
66
67 mrsCpsrIop = InstObjParams("mrs", "MrsCpsr", "MrsOp",
68 { "code": mrsCpsrCode,
69 "predicate_test": condPredicateTest },
70 ["IsSerializeBefore"])
71 header_output += MrsDeclare.subst(mrsCpsrIop)
72 decoder_output += MrsConstructor.subst(mrsCpsrIop)

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78 "predicate_test": predicateTest },
79 ["IsSerializeBefore"])
80 header_output += MrsDeclare.subst(mrsSpsrIop)
81 decoder_output += MrsConstructor.subst(mrsSpsrIop)
82 exec_output += PredOpExecute.subst(mrsSpsrIop)
83
84 msrCpsrRegCode = '''
85 SCTLR sctlr = Sctlr;
70 '''
71
72 mrsCpsrIop = InstObjParams("mrs", "MrsCpsr", "MrsOp",
73 { "code": mrsCpsrCode,
74 "predicate_test": condPredicateTest },
75 ["IsSerializeBefore"])
76 header_output += MrsDeclare.subst(mrsCpsrIop)
77 decoder_output += MrsConstructor.subst(mrsCpsrIop)

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83 "predicate_test": predicateTest },
84 ["IsSerializeBefore"])
85 header_output += MrsDeclare.subst(mrsSpsrIop)
86 decoder_output += MrsConstructor.subst(mrsSpsrIop)
87 exec_output += PredOpExecute.subst(mrsSpsrIop)
88
89 msrCpsrRegCode = '''
90 SCTLR sctlr = Sctlr;
86 uint32_t newCpsr =
87 cpsrWriteByInstr(Cpsr | CondCodesF | CondCodesGE, Op1,
88 byteMask, false, sctlr.nmfi);
89 Cpsr = ~CondCodesMask & newCpsr;
90 CondCodesF = CondCodesMaskF & newCpsr;
91 CondCodesGE = CondCodesMaskGE & newCpsr;
91 CPSR old_cpsr = Cpsr;
92 old_cpsr.nz = CondCodesNZ;
93 old_cpsr.c = CondCodesC;
94 old_cpsr.v = CondCodesV;
95 old_cpsr.ge = CondCodesGE;
96
97 CPSR new_cpsr =
98 cpsrWriteByInstr(old_cpsr, Op1, byteMask, false, sctlr.nmfi);
99 Cpsr = ~CondCodesMask & new_cpsr;
100 CondCodesNZ = new_cpsr.nz;
101 CondCodesC = new_cpsr.c;
102 CondCodesV = new_cpsr.v;
103 CondCodesGE = new_cpsr.ge;
92 '''
93 msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
94 { "code": msrCpsrRegCode,
95 "predicate_test": condPredicateTest },
96 ["IsSerializeAfter","IsNonSpeculative"])
97 header_output += MsrRegDeclare.subst(msrCpsrRegIop)
98 decoder_output += MsrRegConstructor.subst(msrCpsrRegIop)
99 exec_output += PredOpExecute.subst(msrCpsrRegIop)

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104 "predicate_test": predicateTest },
105 ["IsSerializeAfter","IsNonSpeculative"])
106 header_output += MsrRegDeclare.subst(msrSpsrRegIop)
107 decoder_output += MsrRegConstructor.subst(msrSpsrRegIop)
108 exec_output += PredOpExecute.subst(msrSpsrRegIop)
109
110 msrCpsrImmCode = '''
111 SCTLR sctlr = Sctlr;
104 '''
105 msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
106 { "code": msrCpsrRegCode,
107 "predicate_test": condPredicateTest },
108 ["IsSerializeAfter","IsNonSpeculative"])
109 header_output += MsrRegDeclare.subst(msrCpsrRegIop)
110 decoder_output += MsrRegConstructor.subst(msrCpsrRegIop)
111 exec_output += PredOpExecute.subst(msrCpsrRegIop)

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116 "predicate_test": predicateTest },
117 ["IsSerializeAfter","IsNonSpeculative"])
118 header_output += MsrRegDeclare.subst(msrSpsrRegIop)
119 decoder_output += MsrRegConstructor.subst(msrSpsrRegIop)
120 exec_output += PredOpExecute.subst(msrSpsrRegIop)
121
122 msrCpsrImmCode = '''
123 SCTLR sctlr = Sctlr;
112 uint32_t newCpsr =
113 cpsrWriteByInstr(Cpsr | CondCodesF | CondCodesGE, imm,
114 byteMask, false, sctlr.nmfi);
115 Cpsr = ~CondCodesMask & newCpsr;
116 CondCodesF = CondCodesMaskF & newCpsr;
117 CondCodesGE = CondCodesMaskGE & newCpsr;
124 CPSR old_cpsr = Cpsr;
125 old_cpsr.nz = CondCodesNZ;
126 old_cpsr.c = CondCodesC;
127 old_cpsr.v = CondCodesV;
128 old_cpsr.ge = CondCodesGE;
129 CPSR new_cpsr =
130 cpsrWriteByInstr(old_cpsr, imm, byteMask, false, sctlr.nmfi);
131 Cpsr = ~CondCodesMask & new_cpsr;
132 CondCodesNZ = new_cpsr.nz;
133 CondCodesC = new_cpsr.c;
134 CondCodesV = new_cpsr.v;
135 CondCodesGE = new_cpsr.ge;
118 '''
119 msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
120 { "code": msrCpsrImmCode,
121 "predicate_test": condPredicateTest },
122 ["IsSerializeAfter","IsNonSpeculative"])
123 header_output += MsrImmDeclare.subst(msrCpsrImmIop)
124 decoder_output += MsrImmConstructor.subst(msrCpsrImmIop)
125 exec_output += PredOpExecute.subst(msrCpsrImmIop)

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410 exec_output += PredOpExecute.subst(uxtahIop)
411
412 selCode = '''
413 uint32_t resTemp = 0;
414 for (unsigned i = 0; i < 4; i++) {
415 int low = i * 8;
416 int high = low + 7;
417 replaceBits(resTemp, high, low,
136 '''
137 msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
138 { "code": msrCpsrImmCode,
139 "predicate_test": condPredicateTest },
140 ["IsSerializeAfter","IsNonSpeculative"])
141 header_output += MsrImmDeclare.subst(msrCpsrImmIop)
142 decoder_output += MsrImmConstructor.subst(msrCpsrImmIop)
143 exec_output += PredOpExecute.subst(msrCpsrImmIop)

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428 exec_output += PredOpExecute.subst(uxtahIop)
429
430 selCode = '''
431 uint32_t resTemp = 0;
432 for (unsigned i = 0; i < 4; i++) {
433 int low = i * 8;
434 int high = low + 7;
435 replaceBits(resTemp, high, low,
418 bits(CondCodesGE, 16 + i) ?
436 bits(CondCodesGE, i) ?
419 bits(Op1, high, low) : bits(Op2, high, low));
420 }
421 Dest = resTemp;
422 '''
423 selIop = InstObjParams("sel", "Sel", "RegRegRegOp",
424 { "code": selCode,
437 bits(Op1, high, low) : bits(Op2, high, low));
438 }
439 Dest = resTemp;
440 '''
441 selIop = InstObjParams("sel", "Sel", "RegRegRegOp",
442 { "code": selCode,
425 "predicate_test": condPredicateTest }, [])
443 "predicate_test": predicateTest }, [])
426 header_output += RegRegRegOpDeclare.subst(selIop)
427 decoder_output += RegRegRegOpConstructor.subst(selIop)
428 exec_output += PredOpExecute.subst(selIop)
429
430 usad8Code = '''
431 uint32_t resTemp = 0;
432 for (unsigned i = 0; i < 4; i++) {
433 int low = i * 8;

--- 341 unchanged lines hidden --- 		444 header_output += RegRegRegOpDeclare.subst(selIop)
445 decoder_output += RegRegRegOpConstructor.subst(selIop)
446 exec_output += PredOpExecute.subst(selIop)
447
448 usad8Code = '''
449 uint32_t resTemp = 0;
450 for (unsigned i = 0; i < 4; i++) {
451 int low = i * 8;

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