misc.isa (7848:cc5e64f8423f) misc.isa (7858:ee6641d7c713)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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80
81 msrCpsrRegCode = '''
82 SCTLR sctlr = Sctlr;
83 uint32_t newCpsr =
84 cpsrWriteByInstr(Cpsr | CondCodes, Op1, byteMask, false, sctlr.nmfi);
85 Cpsr = ~CondCodesMask & newCpsr;
86 NextThumb = ((CPSR)newCpsr).t;
87 NextJazelle = ((CPSR)newCpsr).j;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 71 unchanged lines hidden (view full) ---

80
81 msrCpsrRegCode = '''
82 SCTLR sctlr = Sctlr;
83 uint32_t newCpsr =
84 cpsrWriteByInstr(Cpsr | CondCodes, Op1, byteMask, false, sctlr.nmfi);
85 Cpsr = ~CondCodesMask & newCpsr;
86 NextThumb = ((CPSR)newCpsr).t;
87 NextJazelle = ((CPSR)newCpsr).j;
88 ForcedItState = ((((CPSR)Op1).it2 << 2) & 0xFC)
89 | (((CPSR)Op1).it1 & 0x3);
88 CondCodes = CondCodesMask & newCpsr;
89 '''
90 msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
91 { "code": msrCpsrRegCode,
92 "predicate_test": condPredicateTest },
93 ["IsSerializeAfter","IsNonSpeculative"])
94 header_output += MsrRegDeclare.subst(msrCpsrRegIop)
95 decoder_output += MsrRegConstructor.subst(msrCpsrRegIop)

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106
107 msrCpsrImmCode = '''
108 SCTLR sctlr = Sctlr;
109 uint32_t newCpsr =
110 cpsrWriteByInstr(Cpsr | CondCodes, imm, byteMask, false, sctlr.nmfi);
111 Cpsr = ~CondCodesMask & newCpsr;
112 NextThumb = ((CPSR)newCpsr).t;
113 NextJazelle = ((CPSR)newCpsr).j;
90 CondCodes = CondCodesMask & newCpsr;
91 '''
92 msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
93 { "code": msrCpsrRegCode,
94 "predicate_test": condPredicateTest },
95 ["IsSerializeAfter","IsNonSpeculative"])
96 header_output += MsrRegDeclare.subst(msrCpsrRegIop)
97 decoder_output += MsrRegConstructor.subst(msrCpsrRegIop)

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108
109 msrCpsrImmCode = '''
110 SCTLR sctlr = Sctlr;
111 uint32_t newCpsr =
112 cpsrWriteByInstr(Cpsr | CondCodes, imm, byteMask, false, sctlr.nmfi);
113 Cpsr = ~CondCodesMask & newCpsr;
114 NextThumb = ((CPSR)newCpsr).t;
115 NextJazelle = ((CPSR)newCpsr).j;
116 ForcedItState = ((((CPSR)imm).it2 << 2) & 0xFC)
117 | (((CPSR)imm).it1 & 0x3);
114 CondCodes = CondCodesMask & newCpsr;
115 '''
116 msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
117 { "code": msrCpsrImmCode,
118 "predicate_test": condPredicateTest },
119 ["IsSerializeAfter","IsNonSpeculative"])
120 header_output += MsrImmDeclare.subst(msrCpsrImmIop)
121 decoder_output += MsrImmConstructor.subst(msrCpsrImmIop)

--- 640 unchanged lines hidden --- 		118 CondCodes = CondCodesMask & newCpsr;
119 '''
120 msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
121 { "code": msrCpsrImmCode,
122 "predicate_test": condPredicateTest },
123 ["IsSerializeAfter","IsNonSpeculative"])
124 header_output += MsrImmDeclare.subst(msrCpsrImmIop)
125 decoder_output += MsrImmConstructor.subst(msrCpsrImmIop)

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