misc.isa (7315:3a635c897874) misc.isa (7347:baefb46b29b2)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 487 unchanged lines hidden (view full) ---

496 '''
497 bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp",
498 { "code": bfiCode,
499 "predicate_test": predicateTest }, [])
500 header_output += RegRegImmImmOpDeclare.subst(bfiIop)
501 decoder_output += RegRegImmImmOpConstructor.subst(bfiIop)
502 exec_output += PredOpExecute.subst(bfiIop)
503
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 487 unchanged lines hidden (view full) ---

496 '''
497 bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp",
498 { "code": bfiCode,
499 "predicate_test": predicateTest }, [])
500 header_output += RegRegImmImmOpDeclare.subst(bfiIop)
501 decoder_output += RegRegImmImmOpConstructor.subst(bfiIop)
502 exec_output += PredOpExecute.subst(bfiIop)
503
504 mrc15code = '''
505 CPSR cpsr = Cpsr;
506 if (cpsr.mode == MODE_USER)
507#if FULL_SYSTEM
508 return new UndefinedInstruction;
509#else
510 return new UndefinedInstruction(false, mnemonic);
511#endif
512 Dest = MiscOp1;
513 '''
514
504 mrc15Iop = InstObjParams("mrc", "Mrc15", "RegRegOp",
515 mrc15Iop = InstObjParams("mrc", "Mrc15", "RegRegOp",
505 { "code": "Dest = MiscOp1;",
516 { "code": mrc15code,
506 "predicate_test": predicateTest }, [])
507 header_output += RegRegOpDeclare.subst(mrc15Iop)
508 decoder_output += RegRegOpConstructor.subst(mrc15Iop)
509 exec_output += PredOpExecute.subst(mrc15Iop)
510
517 "predicate_test": predicateTest }, [])
518 header_output += RegRegOpDeclare.subst(mrc15Iop)
519 decoder_output += RegRegOpConstructor.subst(mrc15Iop)
520 exec_output += PredOpExecute.subst(mrc15Iop)
521
522
523 mcr15code = '''
524 CPSR cpsr = Cpsr;
525 if (cpsr.mode == MODE_USER)
526#if FULL_SYSTEM
527 return new UndefinedInstruction;
528#else
529 return new UndefinedInstruction(false, mnemonic);
530#endif
531 MiscDest = Op1;
532 '''
511 mcr15Iop = InstObjParams("mcr", "Mcr15", "RegRegOp",
533 mcr15Iop = InstObjParams("mcr", "Mcr15", "RegRegOp",
512 { "code": "MiscDest = Op1;",
534 { "code": mcr15code,
513 "predicate_test": predicateTest }, [])
514 header_output += RegRegOpDeclare.subst(mcr15Iop)
515 decoder_output += RegRegOpConstructor.subst(mcr15Iop)
516 exec_output += PredOpExecute.subst(mcr15Iop)
517
518 enterxCode = '''
519 FNPC = NPC | (1ULL << PcJBitShift) | (1ULL << PcTBitShift);
520 '''

--- 60 unchanged lines hidden --- 		535 "predicate_test": predicateTest }, [])
536 header_output += RegRegOpDeclare.subst(mcr15Iop)
537 decoder_output += RegRegOpConstructor.subst(mcr15Iop)
538 exec_output += PredOpExecute.subst(mcr15Iop)
539
540 enterxCode = '''
541 FNPC = NPC | (1ULL << PcJBitShift) | (1ULL << PcTBitShift);
542 '''

--- 60 unchanged lines hidden ---