misc.isa (7283:ef8b6a2798cf) | misc.isa (7307:e22429e8f4a0) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 520 unchanged lines hidden (view full) --- 529 FNPC = (NPC & ~(1ULL << PcJBitShift)) | (1ULL << PcTBitShift); 530 ''' 531 leavexIop = InstObjParams("leavex", "Leavex", "PredOp", 532 { "code": leavexCode, 533 "predicate_test": predicateTest }, []) 534 header_output += BasicDeclare.subst(leavexIop) 535 decoder_output += BasicConstructor.subst(leavexIop) 536 exec_output += PredOpExecute.subst(leavexIop) | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 520 unchanged lines hidden (view full) --- 529 FNPC = (NPC & ~(1ULL << PcJBitShift)) | (1ULL << PcTBitShift); 530 ''' 531 leavexIop = InstObjParams("leavex", "Leavex", "PredOp", 532 { "code": leavexCode, 533 "predicate_test": predicateTest }, []) 534 header_output += BasicDeclare.subst(leavexIop) 535 decoder_output += BasicConstructor.subst(leavexIop) 536 exec_output += PredOpExecute.subst(leavexIop) |
537 538 setendCode = ''' 539 CPSR cpsr = Cpsr; 540 cpsr.e = imm; 541 Cpsr = cpsr; 542 ''' 543 setendIop = InstObjParams("setend", "Setend", "ImmOp", 544 { "code": setendCode, 545 "predicate_test": predicateTest }, []) 546 header_output += ImmOpDeclare.subst(setendIop) 547 decoder_output += ImmOpConstructor.subst(setendIop) 548 exec_output += PredOpExecute.subst(setendIop) |
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537}}; | 549}}; |