misc.isa (12504:6a6d80495bd6) misc.isa (12541:de165cf2809e)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013,2017-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41
42 svcCode = '''
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013,2017-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41
42 svcCode = '''
43 fault = std::make_shared<SupervisorCall>(machInst, imm);
43 ThreadContext *tc = xc->tcBase();
44
45 const auto semihost_imm = Thumb? 0xAB : 0x123456;
46
47 if (ArmSystem::haveSemihosting(tc) && imm == semihost_imm) {
48 R0 = ArmSystem::callSemihosting32(tc, R0, R1);
49 } else {
50 fault = std::make_shared<SupervisorCall>(machInst, imm);
51 }
44 '''
45
46 svcIop = InstObjParams("svc", "Svc", "ImmOp",
47 { "code": svcCode,
52 '''
53
54 svcIop = InstObjParams("svc", "Svc", "ImmOp",
55 { "code": svcCode,
48 "predicate_test": predicateTest },
49 ["IsSyscall", "IsNonSpeculative", "IsSerializeAfter"])
56 "predicate_test": predicateTest,
57 "thumb_semihost": '0xAB',
58 "arm_semihost": '0x123456' },
59 ["IsSyscall", "IsNonSpeculative",
60 "IsSerializeAfter"])
50 header_output = ImmOpDeclare.subst(svcIop)
61 header_output = ImmOpDeclare.subst(svcIop)
51 decoder_output = ImmOpConstructor.subst(svcIop)
62 decoder_output = SemihostConstructor.subst(svcIop)
52 exec_output = PredOpExecute.subst(svcIop)
53
54 smcCode = '''
55 HCR hcr = Hcr;
56 CPSR cpsr = Cpsr;
57 SCR scr = Scr;
58
59 if ((cpsr.mode != MODE_USER) && FullSystem) {

--- 1177 unchanged lines hidden --- 		63 exec_output = PredOpExecute.subst(svcIop)
64
65 smcCode = '''
66 HCR hcr = Hcr;
67 CPSR cpsr = Cpsr;
68 SCR scr = Scr;
69
70 if ((cpsr.mode != MODE_USER) && FullSystem) {

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