mem.isa (8588:ef28ed90449d) mem.isa (10037:5cac77888310)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
3// Copyright (c) 2010-2012 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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43 def __init__(self):
44 self.fullExecTemplate = eval(self.execBase + 'Execute')
45 self.initiateAccTemplate = eval(self.execBase + 'InitiateAcc')
46 self.completeAccTemplate = eval(self.execBase + 'CompleteAcc')
47 self.declareTemplate = eval(self.decConstBase + 'Declare')
48 self.constructTemplate = eval(self.decConstBase + 'Constructor')
49
50 def fillTemplates(self, name, Name, codeBlobs, memFlags, instFlags,
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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43 def __init__(self):
44 self.fullExecTemplate = eval(self.execBase + 'Execute')
45 self.initiateAccTemplate = eval(self.execBase + 'InitiateAcc')
46 self.completeAccTemplate = eval(self.execBase + 'CompleteAcc')
47 self.declareTemplate = eval(self.decConstBase + 'Declare')
48 self.constructTemplate = eval(self.decConstBase + 'Constructor')
49
50 def fillTemplates(self, name, Name, codeBlobs, memFlags, instFlags,
51 base = 'Memory', wbDecl = None, pcDecl = None,
52 rasPop = False):
51 base='Memory', wbDecl=None, pcDecl=None,
52 rasPop=False, size=4, sign=False, faCode=None):
53 # Make sure flags are in lists (convert to lists if not).
54 memFlags = makeList(memFlags)
55 instFlags = makeList(instFlags)
56
57 eaCode = codeBlobs["ea_code"]
58
59 # This shouldn't be part of the eaCode, but until the exec templates
60 # are converted over it's the easiest place to put it.
61 eaCode += '\n unsigned memAccessFlags = '
62 eaCode += (string.join(memFlags, '|') + ';')
63
64 codeBlobs["ea_code"] = eaCode
65
53 # Make sure flags are in lists (convert to lists if not).
54 memFlags = makeList(memFlags)
55 instFlags = makeList(instFlags)
56
57 eaCode = codeBlobs["ea_code"]
58
59 # This shouldn't be part of the eaCode, but until the exec templates
60 # are converted over it's the easiest place to put it.
61 eaCode += '\n unsigned memAccessFlags = '
62 eaCode += (string.join(memFlags, '|') + ';')
63
64 codeBlobs["ea_code"] = eaCode
65
66 if faCode:
67 # For AArch64 the fa_code snippet comes already assembled here
68 codeBlobs["fa_code"] = faCode
69 elif wbDecl == None:
70 codeBlobs["fa_code"] = '''
71 if (dest != INTREG_PC) {
72 fault->annotate(ArmFault::SAS, %s);
73 fault->annotate(ArmFault::SSE, %s);
74 fault->annotate(ArmFault::SRT, dest);
75 }
76 ''' %("0" if size == 1 else
77 "1" if size == 2 else "2",
78 "true" if sign else "false")
79 else:
80 codeBlobs["fa_code"] = ''
81
66 macroName = Name
67 instFlagsCopy = list(instFlags)
68 codeBlobsCopy = dict(codeBlobs)
69
70 use_uops = 0
71 if wbDecl is not None or pcDecl is not None:
72 instFlagsCopy.append('IsMicroop')
73 Name = Name + 'Acc'

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103 if wbDecl is not None or pcDecl is not None:
104 iop = InstObjParams(name, macroName, base,
105 { "wb_decl" : wbDecl,
106 "pc_decl" : pcDecl,
107 "acc_name" : Name,
108 "use_uops" : use_uops,
109 "use_pc" : use_pc,
110 "use_wb" : use_wb,
82 macroName = Name
83 instFlagsCopy = list(instFlags)
84 codeBlobsCopy = dict(codeBlobs)
85
86 use_uops = 0
87 if wbDecl is not None or pcDecl is not None:
88 instFlagsCopy.append('IsMicroop')
89 Name = Name + 'Acc'

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119 if wbDecl is not None or pcDecl is not None:
120 iop = InstObjParams(name, macroName, base,
121 { "wb_decl" : wbDecl,
122 "pc_decl" : pcDecl,
123 "acc_name" : Name,
124 "use_uops" : use_uops,
125 "use_pc" : use_pc,
126 "use_wb" : use_wb,
127 "fa_code" : '',
111 "is_ras_pop" : is_ras_pop },
112 ['IsMacroop'])
113 header_output += self.declareTemplate.subst(iop)
114 decoder_output += self.constructTemplate.subst(iop)
115 exec_output += PanicExecute.subst(iop) + \
116 PanicInitiateAcc.subst(iop) + \
117 PanicCompleteAcc.subst(iop)
118

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171 else:
172 Name += "_%sN" % letter
173
174 Name += ('_SZ%d' % size)
175
176 return Name
177
178 def buildMemSuffix(sign, size):
128 "is_ras_pop" : is_ras_pop },
129 ['IsMacroop'])
130 header_output += self.declareTemplate.subst(iop)
131 decoder_output += self.constructTemplate.subst(iop)
132 exec_output += PanicExecute.subst(iop) + \
133 PanicInitiateAcc.subst(iop) + \
134 PanicCompleteAcc.subst(iop)
135

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188 else:
189 Name += "_%sN" % letter
190
191 Name += ('_SZ%d' % size)
192
193 return Name
194
195 def buildMemSuffix(sign, size):
179 if size == 4:
180 memSuffix = ''
196 if size == 8:
197 memSuffix = '_ud'
198 elif size == 4:
199 if sign:
200 memSuffix = '_sw'
201 else:
202 memSuffix = '_uw'
181 elif size == 2:
182 if sign:
183 memSuffix = '_sh'
184 else:
185 memSuffix = '_uh'
186 elif size == 1:
187 if sign:
188 memSuffix = '_sb'

--- 19 unchanged lines hidden --- 		203 elif size == 2:
204 if sign:
205 memSuffix = '_sh'
206 else:
207 memSuffix = '_uh'
208 elif size == 1:
209 if sign:
210 memSuffix = '_sb'

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