1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41 def loadStoreBaseWork(name, Name, imm, swp, codeBlobs, memFlags,
| 1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41 def loadStoreBaseWork(name, Name, imm, swp, codeBlobs, memFlags,
|
42 instFlags, base = 'Memory', execTemplateBase = ''):
| 42 instFlags, double, base = 'Memory',
43 execTemplateBase = ''):
|
43 # Make sure flags are in lists (convert to lists if not).
44 memFlags = makeList(memFlags)
45 instFlags = makeList(instFlags)
46
47 eaCode = codeBlobs["ea_code"]
48
49 # This shouldn't be part of the eaCode, but until the exec templates
50 # are converted over it's the easiest place to put it.
51 eaCode += '\n unsigned memAccessFlags = '
52 if memFlags:
53 eaCode += (string.join(memFlags, '|') + ';')
54 else:
55 eaCode += '0;'
56
57 codeBlobs["ea_code"] = eaCode
58
59 iop = InstObjParams(name, Name, base, codeBlobs, instFlags)
60
61 fullExecTemplate = eval(execTemplateBase + 'Execute')
62 initiateAccTemplate = eval(execTemplateBase + 'InitiateAcc')
63 completeAccTemplate = eval(execTemplateBase + 'CompleteAcc')
64
65 if swp:
66 declareTemplate = SwapDeclare
67 constructTemplate = SwapConstructor
68 elif imm:
| 44 # Make sure flags are in lists (convert to lists if not).
45 memFlags = makeList(memFlags)
46 instFlags = makeList(instFlags)
47
48 eaCode = codeBlobs["ea_code"]
49
50 # This shouldn't be part of the eaCode, but until the exec templates
51 # are converted over it's the easiest place to put it.
52 eaCode += '\n unsigned memAccessFlags = '
53 if memFlags:
54 eaCode += (string.join(memFlags, '|') + ';')
55 else:
56 eaCode += '0;'
57
58 codeBlobs["ea_code"] = eaCode
59
60 iop = InstObjParams(name, Name, base, codeBlobs, instFlags)
61
62 fullExecTemplate = eval(execTemplateBase + 'Execute')
63 initiateAccTemplate = eval(execTemplateBase + 'InitiateAcc')
64 completeAccTemplate = eval(execTemplateBase + 'CompleteAcc')
65
66 if swp:
67 declareTemplate = SwapDeclare
68 constructTemplate = SwapConstructor
69 elif imm:
|
69 declareTemplate = LoadStoreImmDeclare
70 constructTemplate = LoadStoreImmConstructor
| 70 if double:
71 declareTemplate = LoadStoreDImmDeclare
72 constructTemplate = LoadStoreDImmConstructor
73 else:
74 declareTemplate = LoadStoreImmDeclare
75 constructTemplate = LoadStoreImmConstructor
|
71 else:
| 76 else:
|
72 declareTemplate = LoadStoreRegDeclare
73 constructTemplate = LoadStoreRegConstructor
| 77 if double:
78 declareTemplate = LoadStoreDRegDeclare
79 constructTemplate = LoadStoreDRegConstructor
80 else:
81 declareTemplate = LoadStoreRegDeclare
82 constructTemplate = LoadStoreRegConstructor
|
74
75 # (header_output, decoder_output, decode_block, exec_output)
76 return (declareTemplate.subst(iop),
77 constructTemplate.subst(iop),
78 fullExecTemplate.subst(iop)
79 + initiateAccTemplate.subst(iop)
80 + completeAccTemplate.subst(iop))
81
82 def loadStoreBase(name, Name, imm, eaCode, accCode, memFlags,
| 83
84 # (header_output, decoder_output, decode_block, exec_output)
85 return (declareTemplate.subst(iop),
86 constructTemplate.subst(iop),
87 fullExecTemplate.subst(iop)
88 + initiateAccTemplate.subst(iop)
89 + completeAccTemplate.subst(iop))
90
91 def loadStoreBase(name, Name, imm, eaCode, accCode, memFlags,
|
83 instFlags, base = 'Memory', execTemplateBase = ''):
| 92 instFlags, double, base = 'Memory',
93 execTemplateBase = ''):
|
84 codeBlobs = { "ea_code": eaCode,
85 "memacc_code": accCode,
86 "predicate_test": predicateTest }
87 return loadStoreBaseWork(name, Name, imm, False, codeBlobs, memFlags,
| 94 codeBlobs = { "ea_code": eaCode,
95 "memacc_code": accCode,
96 "predicate_test": predicateTest }
97 return loadStoreBaseWork(name, Name, imm, False, codeBlobs, memFlags,
|
88 instFlags, base, execTemplateBase)
| 98 instFlags, double, base, execTemplateBase)
|
89
90 def SwapBase(name, Name, eaCode, preAccCode, postAccCode, memFlags,
91 instFlags):
92 codeBlobs = { "ea_code": eaCode,
93 "preacc_code": preAccCode,
94 "postacc_code": postAccCode,
95 "predicate_test": predicateTest }
96 return loadStoreBaseWork(name, Name, False, True, codeBlobs, memFlags,
| 99
100 def SwapBase(name, Name, eaCode, preAccCode, postAccCode, memFlags,
101 instFlags):
102 codeBlobs = { "ea_code": eaCode,
103 "preacc_code": preAccCode,
104 "postacc_code": postAccCode,
105 "predicate_test": predicateTest }
106 return loadStoreBaseWork(name, Name, False, True, codeBlobs, memFlags,
|
97 instFlags, 'Swap', 'Swap')
| 107 instFlags, False, 'Swap', 'Swap')
|
98
99 def memClassName(base, post, add, writeback, \
100 size=4, sign=False, user=False):
101 Name = base
102
103 if post:
104 Name += '_PY'
105 else:
106 Name += '_PN'
107
108 if add:
109 Name += '_AY'
110 else:
111 Name += '_AN'
112
113 if writeback:
114 Name += '_WY'
115 else:
116 Name += '_WN'
117
118 Name += ('_SZ%d' % size)
119
120 if sign:
121 Name += '_SY'
122 else:
123 Name += '_SN'
124
125 if user:
126 Name += '_UY'
127 else:
128 Name += '_UN'
129
130 return Name
131
132 def buildMemSuffix(sign, size):
133 if size == 4:
134 memSuffix = ''
135 elif size == 2:
136 if sign:
137 memSuffix = '.sh'
138 else:
139 memSuffix = '.uh'
140 elif size == 1:
141 if sign:
142 memSuffix = '.sb'
143 else:
144 memSuffix = '.ub'
145 else:
146 raise Exception, "Unrecognized size for load %d" % size
147
148 return memSuffix
149
150 def buildMemBase(base, post, writeback):
151 if post and writeback:
152 base = "MemoryPostIndex<%s>" % base
153 elif not post and writeback:
154 base = "MemoryPreIndex<%s>" % base
155 elif not post and not writeback:
156 base = "MemoryOffset<%s>" % base
157 else:
158 raise Exception, "Illegal combination of post and writeback"
159 return base
160}};
161
| 108
109 def memClassName(base, post, add, writeback, \
110 size=4, sign=False, user=False):
111 Name = base
112
113 if post:
114 Name += '_PY'
115 else:
116 Name += '_PN'
117
118 if add:
119 Name += '_AY'
120 else:
121 Name += '_AN'
122
123 if writeback:
124 Name += '_WY'
125 else:
126 Name += '_WN'
127
128 Name += ('_SZ%d' % size)
129
130 if sign:
131 Name += '_SY'
132 else:
133 Name += '_SN'
134
135 if user:
136 Name += '_UY'
137 else:
138 Name += '_UN'
139
140 return Name
141
142 def buildMemSuffix(sign, size):
143 if size == 4:
144 memSuffix = ''
145 elif size == 2:
146 if sign:
147 memSuffix = '.sh'
148 else:
149 memSuffix = '.uh'
150 elif size == 1:
151 if sign:
152 memSuffix = '.sb'
153 else:
154 memSuffix = '.ub'
155 else:
156 raise Exception, "Unrecognized size for load %d" % size
157
158 return memSuffix
159
160 def buildMemBase(base, post, writeback):
161 if post and writeback:
162 base = "MemoryPostIndex<%s>" % base
163 elif not post and writeback:
164 base = "MemoryPreIndex<%s>" % base
165 elif not post and not writeback:
166 base = "MemoryOffset<%s>" % base
167 else:
168 raise Exception, "Illegal combination of post and writeback"
169 return base
170}};
171
|