1// -*- mode:c++ -*- 2 |
3// Copyright (c) 2011-2014 ARM Limited |
4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated --- 170 unchanged lines hidden (view full) --- 182 if self.size in (1, 2, 4): 183 accCode = ''' 184 AA64FpDestP0_uw = cSwap(Mem%s, 185 isBigEndian64(xc->tcBase())); 186 AA64FpDestP1_uw = 0; 187 AA64FpDestP2_uw = 0; 188 AA64FpDestP3_uw = 0; 189 ''' |
190 elif self.size == 8: |
191 accCode = ''' 192 uint64_t data = cSwap(Mem%s, 193 isBigEndian64(xc->tcBase())); 194 AA64FpDestP0_uw = (uint32_t)data; 195 AA64FpDestP1_uw = (data >> 32); |
196 AA64FpDestP2_uw = 0; 197 AA64FpDestP3_uw = 0; |
198 ''' |
199 elif self.size == 16: |
200 accCode = ''' |
201 Twin64_t data = cSwap(Mem%s, 202 isBigEndian64(xc->tcBase())); 203 204 205 AA64FpDestP0_uw = (uint32_t)data.a; 206 AA64FpDestP1_uw = (data.a >> 32); 207 AA64FpDestP2_uw = (uint32_t)data.b; 208 AA64FpDestP3_uw = (data.b >> 32); |
209 ''' 210 elif self.flavor == "widen" or self.size == 8: 211 accCode = "XDest = cSwap(Mem%s, isBigEndian64(xc->tcBase()));" 212 else: 213 accCode = "WDest = cSwap(Mem%s, isBigEndian64(xc->tcBase()));" |
214 |
215 accCode = accCode % buildMemSuffix(self.sign, self.size) 216 |
217 self.codeBlobs["memacc_code"] = accCode 218 219 # Push it out to the output files 220 wbDecl = None 221 if self.writeback and not self.micro: 222 wbDecl = self.wbDecl 223 self.emitHelper(self.base, wbDecl) 224 225 class LoadDouble64(LoadInst64): 226 def emit(self): 227 self.buildEACode() 228 229 # Code that actually handles the access 230 if self.flavor == "fp": |
231 if self.size == 4: 232 accCode = ''' 233 uint64_t data = cSwap(Mem_ud, isBigEndian64(xc->tcBase())); 234 AA64FpDestP0_uw = (uint32_t)data; 235 AA64FpDestP1_uw = 0; 236 AA64FpDestP2_uw = 0; 237 AA64FpDestP3_uw = 0; 238 AA64FpDest2P0_uw = (data >> 32); 239 AA64FpDest2P1_uw = 0; 240 AA64FpDest2P2_uw = 0; 241 AA64FpDest2P3_uw = 0; 242 ''' 243 elif self.size == 8: 244 accCode = ''' 245 AA64FpDestP0_uw = (uint32_t)Mem_tud.a; 246 AA64FpDestP1_uw = (uint32_t)(Mem_tud.a >> 32); 247 AA64FpDestP2_uw = 0; 248 AA64FpDestP3_uw = 0; 249 AA64FpDest2P0_uw = (uint32_t)Mem_tud.b; 250 AA64FpDest2P1_uw = (uint32_t)(Mem_tud.b >> 32); 251 AA64FpDest2P2_uw = 0; 252 AA64FpDest2P3_uw = 0; 253 ''' |
254 else: 255 if self.sign: 256 if self.size == 4: 257 accCode = ''' 258 uint64_t data = cSwap(Mem_ud, 259 isBigEndian64(xc->tcBase())); 260 XDest = sext<32>((uint32_t)data); 261 XDest2 = sext<32>(data >> 32); 262 ''' 263 elif self.size == 8: 264 accCode = ''' |
265 XDest = Mem_tud.a; 266 XDest2 = Mem_tud.b; |
267 ''' 268 else: 269 if self.size == 4: 270 accCode = ''' 271 uint64_t data = cSwap(Mem_ud, 272 isBigEndian64(xc->tcBase())); 273 XDest = (uint32_t)data; 274 XDest2 = data >> 32; --- 145 unchanged lines hidden (view full) --- 420 class LoadRegU64(LoadReg64): 421 decConstBase = 'LoadStoreRegU64' 422 micro = True 423 424 class LoadLitU64(LoadLit64): 425 decConstBase = 'LoadStoreLitU64' 426 micro = True 427 |
428 LoadImmDU64("ldp_uop", "MicroLdPairUop", 8).emit() 429 LoadImmDU64("ldp_fp8_uop", "MicroLdPairFp8Uop", 8, flavor="fp").emit() 430 LoadImmU64("ldfp16_uop", "MicroLdFp16Uop", 16, flavor="fp").emit() 431 LoadReg64("ldfp16reg_uop", "MicroLdFp16RegUop", 16, flavor="fp").emit() 432 |
433 LoadImmDouble64("ldaxp", "LDAXPW64", 4, flavor="acexp").emit() 434 LoadImmDouble64("ldaxp", "LDAXPX64", 8, flavor="acexp").emit() 435 LoadImmDouble64("ldxp", "LDXPW64", 4, flavor="exp").emit() 436 LoadImmDouble64("ldxp", "LDXPX64", 8, flavor="exp").emit() 437 438 LoadImmU64("ldrxi_uop", "MicroLdrXImmUop", 8).emit() 439 LoadRegU64("ldrxr_uop", "MicroLdrXRegUop", 8).emit() 440 LoadLitU64("ldrxl_uop", "MicroLdrXLitUop", 8, literal=True).emit() 441 LoadImmU64("ldrfpxi_uop", "MicroLdrFpXImmUop", 8, flavor="fp").emit() 442 LoadRegU64("ldrfpxr_uop", "MicroLdrFpXRegUop", 8, flavor="fp").emit() 443 LoadLitU64("ldrfpxl_uop", "MicroLdrFpXLitUop", 8, literal=True, 444 flavor="fp").emit() |
445 LoadLitU64("ldfp16_lit__uop", "MicroLdFp16LitUop", 446 16, literal=True, flavor="fp").emit() |
447 LoadImmDU64("ldrduxi_uop", "MicroLdrDUXImmUop", 4, sign=False).emit() 448 LoadImmDU64("ldrdsxi_uop", "MicroLdrDSXImmUop", 4, sign=True).emit() 449 LoadImmDU64("ldrdfpxi_uop", "MicroLdrDFpXImmUop", 4, flavor="fp").emit() 450}}; |