3c3
< // Copyright (c) 2011-2013 ARM Limited
---
> // Copyright (c) 2011-2014 ARM Limited
190c190
< elif self.size == 8 or (self.size == 16 and not self.top):
---
> elif self.size == 8:
195a196,197
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
197,204c199
< # Only zero out the other half if this isn't part of a
< # pair of 8 byte loads implementing a 16 byte load.
< if self.size == 8:
< accCode += '''
< AA64FpDestP2_uw = 0;
< AA64FpDestP3_uw = 0;
< '''
< elif self.size == 16 and self.top:
---
> elif self.size == 16:
206,209c201,208
< uint64_t data = cSwap(Mem%s,
< isBigEndian64(xc->tcBase()));
< AA64FpDestP2_uw = (uint32_t)data;
< AA64FpDestP3_uw = (data >> 32);
---
> Twin64_t data = cSwap(Mem%s,
> isBigEndian64(xc->tcBase()));
>
>
> AA64FpDestP0_uw = (uint32_t)data.a;
> AA64FpDestP1_uw = (data.a >> 32);
> AA64FpDestP2_uw = (uint32_t)data.b;
> AA64FpDestP3_uw = (data.b >> 32);
215,218d213
< if self.size == 16:
< accCode = accCode % buildMemSuffix(self.sign, 8)
< else:
< accCode = accCode % buildMemSuffix(self.sign, self.size)
219a215,216
> accCode = accCode % buildMemSuffix(self.sign, self.size)
>
234,244c231,253
< accCode = '''
< uint64_t data = cSwap(Mem_ud, isBigEndian64(xc->tcBase()));
< AA64FpDestP0_uw = (uint32_t)data;
< AA64FpDestP1_uw = 0;
< AA64FpDestP2_uw = 0;
< AA64FpDestP3_uw = 0;
< AA64FpDest2P0_uw = (data >> 32);
< AA64FpDest2P1_uw = 0;
< AA64FpDest2P2_uw = 0;
< AA64FpDest2P3_uw = 0;
< '''
---
> if self.size == 4:
> accCode = '''
> uint64_t data = cSwap(Mem_ud, isBigEndian64(xc->tcBase()));
> AA64FpDestP0_uw = (uint32_t)data;
> AA64FpDestP1_uw = 0;
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> AA64FpDest2P0_uw = (data >> 32);
> AA64FpDest2P1_uw = 0;
> AA64FpDest2P2_uw = 0;
> AA64FpDest2P3_uw = 0;
> '''
> elif self.size == 8:
> accCode = '''
> AA64FpDestP0_uw = (uint32_t)Mem_tud.a;
> AA64FpDestP1_uw = (uint32_t)(Mem_tud.a >> 32);
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> AA64FpDest2P0_uw = (uint32_t)Mem_tud.b;
> AA64FpDest2P1_uw = (uint32_t)(Mem_tud.b >> 32);
> AA64FpDest2P2_uw = 0;
> AA64FpDest2P3_uw = 0;
> '''
256,257c265,266
< XDest = sext<64>(Mem_tud.a);
< XDest2 = sext<64>(Mem_tud.b);
---
> XDest = Mem_tud.a;
> XDest2 = Mem_tud.b;
418a428,432
> LoadImmDU64("ldp_uop", "MicroLdPairUop", 8).emit()
> LoadImmDU64("ldp_fp8_uop", "MicroLdPairFp8Uop", 8, flavor="fp").emit()
> LoadImmU64("ldfp16_uop", "MicroLdFp16Uop", 16, flavor="fp").emit()
> LoadReg64("ldfp16reg_uop", "MicroLdFp16RegUop", 16, flavor="fp").emit()
>
431,442c445,446
< LoadImmU64("ldrqbfpxi_uop", "MicroLdrQBFpXImmUop",
< 16, flavor="fp", top = False).emit()
< LoadRegU64("ldrqbfpxr_uop", "MicroLdrQBFpXRegUop",
< 16, flavor="fp", top = False).emit()
< LoadLitU64("ldrqbfpxl_uop", "MicroLdrQBFpXLitUop",
< 16, literal=True, flavor="fp", top = False).emit()
< LoadImmU64("ldrqtfpxi_uop", "MicroLdrQTFpXImmUop",
< 16, flavor="fp", top = True).emit()
< LoadRegU64("ldrqtfpxr_uop", "MicroLdrQTFpXRegUop",
< 16, flavor="fp", top = True).emit()
< LoadLitU64("ldrqtfpxl_uop", "MicroLdrQTFpXLitUop",
< 16, literal=True, flavor="fp", top = True).emit()
---
> LoadLitU64("ldfp16_lit__uop", "MicroLdFp16LitUop",
> 16, literal=True, flavor="fp").emit()