1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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182 if self.size in (1, 2, 4):
183 accCode = '''
184 AA64FpDestP0_uw = cSwap(Mem%s,
185 isBigEndian64(xc->tcBase()));
186 AA64FpDestP1_uw = 0;
187 AA64FpDestP2_uw = 0;
188 AA64FpDestP3_uw = 0;
189 '''
190 elif self.size == 8 or (self.size == 16 and not self.top):
191 accCode = '''
192 uint64_t data = cSwap(Mem%s,
193 isBigEndian64(xc->tcBase()));
194 AA64FpDestP0_uw = (uint32_t)data;
195 AA64FpDestP1_uw = (data >> 32);
196 '''
197 # Only zero out the other half if this isn't part of a
198 # pair of 8 byte loads implementing a 16 byte load.
199 if self.size == 8:
200 accCode += '''
201 AA64FpDestP2_uw = 0;
202 AA64FpDestP3_uw = 0;
203 '''
204 elif self.size == 16 and self.top:
205 accCode = '''
206 uint64_t data = cSwap(Mem%s,
207 isBigEndian64(xc->tcBase()));
208 AA64FpDestP2_uw = (uint32_t)data;
209 AA64FpDestP3_uw = (data >> 32);
210 '''
211 elif self.flavor == "widen" or self.size == 8:
212 accCode = "XDest = cSwap(Mem%s, isBigEndian64(xc->tcBase()));"
213 else:
214 accCode = "WDest = cSwap(Mem%s, isBigEndian64(xc->tcBase()));"
215 if self.size == 16:
216 accCode = accCode % buildMemSuffix(self.sign, 8)
217 else:
218 accCode = accCode % buildMemSuffix(self.sign, self.size)
219
220 self.codeBlobs["memacc_code"] = accCode
221
222 # Push it out to the output files
223 wbDecl = None
224 if self.writeback and not self.micro:
225 wbDecl = self.wbDecl
226 self.emitHelper(self.base, wbDecl)
227
228 class LoadDouble64(LoadInst64):
229 def emit(self):
230 self.buildEACode()
231
232 # Code that actually handles the access
233 if self.flavor == "fp":
234 accCode = '''
235 uint64_t data = cSwap(Mem_ud, isBigEndian64(xc->tcBase()));
236 AA64FpDestP0_uw = (uint32_t)data;
237 AA64FpDestP1_uw = 0;
238 AA64FpDestP2_uw = 0;
239 AA64FpDestP3_uw = 0;
240 AA64FpDest2P0_uw = (data >> 32);
241 AA64FpDest2P1_uw = 0;
242 AA64FpDest2P2_uw = 0;
243 AA64FpDest2P3_uw = 0;
244 '''
245 else:
246 if self.sign:
247 if self.size == 4:
248 accCode = '''
249 uint64_t data = cSwap(Mem_ud,
250 isBigEndian64(xc->tcBase()));
251 XDest = sext<32>((uint32_t)data);
252 XDest2 = sext<32>(data >> 32);
253 '''
254 elif self.size == 8:
255 accCode = '''
256 XDest = sext<64>(Mem_tud.a);
257 XDest2 = sext<64>(Mem_tud.b);
258 '''
259 else:
260 if self.size == 4:
261 accCode = '''
262 uint64_t data = cSwap(Mem_ud,
263 isBigEndian64(xc->tcBase()));
264 XDest = (uint32_t)data;
265 XDest2 = data >> 32;

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411 class LoadRegU64(LoadReg64):
412 decConstBase = 'LoadStoreRegU64'
413 micro = True
414
415 class LoadLitU64(LoadLit64):
416 decConstBase = 'LoadStoreLitU64'
417 micro = True
418
419 LoadImmDouble64("ldaxp", "LDAXPW64", 4, flavor="acexp").emit()
420 LoadImmDouble64("ldaxp", "LDAXPX64", 8, flavor="acexp").emit()
421 LoadImmDouble64("ldxp", "LDXPW64", 4, flavor="exp").emit()
422 LoadImmDouble64("ldxp", "LDXPX64", 8, flavor="exp").emit()
423
424 LoadImmU64("ldrxi_uop", "MicroLdrXImmUop", 8).emit()
425 LoadRegU64("ldrxr_uop", "MicroLdrXRegUop", 8).emit()
426 LoadLitU64("ldrxl_uop", "MicroLdrXLitUop", 8, literal=True).emit()
427 LoadImmU64("ldrfpxi_uop", "MicroLdrFpXImmUop", 8, flavor="fp").emit()
428 LoadRegU64("ldrfpxr_uop", "MicroLdrFpXRegUop", 8, flavor="fp").emit()
429 LoadLitU64("ldrfpxl_uop", "MicroLdrFpXLitUop", 8, literal=True,
430 flavor="fp").emit()
431 LoadImmU64("ldrqbfpxi_uop", "MicroLdrQBFpXImmUop",
432 16, flavor="fp", top = False).emit()
433 LoadRegU64("ldrqbfpxr_uop", "MicroLdrQBFpXRegUop",
434 16, flavor="fp", top = False).emit()
435 LoadLitU64("ldrqbfpxl_uop", "MicroLdrQBFpXLitUop",
436 16, literal=True, flavor="fp", top = False).emit()
437 LoadImmU64("ldrqtfpxi_uop", "MicroLdrQTFpXImmUop",
438 16, flavor="fp", top = True).emit()
439 LoadRegU64("ldrqtfpxr_uop", "MicroLdrQTFpXRegUop",
440 16, flavor="fp", top = True).emit()
441 LoadLitU64("ldrqtfpxl_uop", "MicroLdrQTFpXLitUop",
442 16, literal=True, flavor="fp", top = True).emit()
443 LoadImmDU64("ldrduxi_uop", "MicroLdrDUXImmUop", 4, sign=False).emit()
444 LoadImmDU64("ldrdsxi_uop", "MicroLdrDSXImmUop", 4, sign=True).emit()
445 LoadImmDU64("ldrdfpxi_uop", "MicroLdrDFpXImmUop", 4, flavor="fp").emit()
446}};