ldr.isa (7858:ee6641d7c713) ldr.isa (8140:7449084b1612)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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62 if self.add:
63 self.op = " +"
64 else:
65 self.op = " -"
66
67 self.memFlags = ["ArmISA::TLB::MustBeOne"]
68 self.codeBlobs = {"postacc_code" : ""}
69
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 53 unchanged lines hidden (view full) ---

62 if self.add:
63 self.op = " +"
64 else:
65 self.op = " -"
66
67 self.memFlags = ["ArmISA::TLB::MustBeOne"]
68 self.codeBlobs = {"postacc_code" : ""}
69
70 def emitHelper(self, base = 'Memory', wbDecl = None, instFlags = []):
70 def emitHelper(self, base = 'Memory', wbDecl = None, instFlags = [], pcDecl = None):
71
72 global header_output, decoder_output, exec_output
73
74 codeBlobs = self.codeBlobs
75 codeBlobs["predicate_test"] = pickPredicate(codeBlobs)
76 (newHeader,
77 newDecoder,
78 newExec) = self.fillTemplates(self.name, self.Name, codeBlobs,
71
72 global header_output, decoder_output, exec_output
73
74 codeBlobs = self.codeBlobs
75 codeBlobs["predicate_test"] = pickPredicate(codeBlobs)
76 (newHeader,
77 newDecoder,
78 newExec) = self.fillTemplates(self.name, self.Name, codeBlobs,
79 self.memFlags, instFlags, base, wbDecl)
79 self.memFlags, instFlags, base,
80 wbDecl, pcDecl)
80
81 header_output += newHeader
82 decoder_output += newDecoder
83 exec_output += newExec
84
85 class RfeInst(LoadInst):
86 decConstBase = 'Rfe'
87

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99 offset -= 8
100 self.codeBlobs["ea_code"] = "EA = Base + %d;" % offset
101
102 wbDiff = -8
103 if self.add:
104 wbDiff = 8
105 accCode = '''
106 CPSR cpsr = Cpsr;
81
82 header_output += newHeader
83 decoder_output += newDecoder
84 exec_output += newExec
85
86 class RfeInst(LoadInst):
87 decConstBase = 'Rfe'
88

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100 offset -= 8
101 self.codeBlobs["ea_code"] = "EA = Base + %d;" % offset
102
103 wbDiff = -8
104 if self.add:
105 wbDiff = 8
106 accCode = '''
107 CPSR cpsr = Cpsr;
107 SCTLR sctlr = Sctlr;
108 // Use the version of NPC that gets set before NextThumb
109 pNPC = cSwap<uint32_t>(Mem.ud, cpsr.e);
110 uint32_t tempSpsr = cSwap<uint32_t>(Mem.ud >> 32, cpsr.e);
111 uint32_t newCpsr =
112 cpsrWriteByInstr(cpsr | CondCodes, tempSpsr,
113 0xF, true, sctlr.nmfi);
114 Cpsr = ~CondCodesMask & newCpsr;
115 NextThumb = ((CPSR)newCpsr).t;
116 NextJazelle = ((CPSR)newCpsr).j;
117 ForcedItState = ((((CPSR)tempSpsr).it2 << 2) & 0xFC)
118 | (((CPSR)tempSpsr).it1 & 0x3);
119 CondCodes = CondCodesMask & newCpsr;
108 URc = cpsr | CondCodes;
109 URa = cSwap<uint32_t>(Mem.ud, cpsr.e);
110 URb = cSwap<uint32_t>(Mem.ud >> 32, cpsr.e);
120 '''
121 self.codeBlobs["memacc_code"] = accCode
122
123 wbDecl = None
111 '''
112 self.codeBlobs["memacc_code"] = accCode
113
114 wbDecl = None
115 pcDecl = "MicroUopSetPCCPSR(machInst, INTREG_UREG0, INTREG_UREG1, INTREG_UREG2);"
116
124 if self.writeback:
125 wbDecl = "MicroAddiUop(machInst, base, base, %d);" % wbDiff
117 if self.writeback:
118 wbDecl = "MicroAddiUop(machInst, base, base, %d);" % wbDiff
126 self.emitHelper('RfeOp', wbDecl, ["IsSerializeAfter", "IsNonSpeculative"])
119 self.emitHelper('RfeOp', wbDecl, ["IsSerializeAfter", "IsNonSpeculative"], pcDecl)
127
128 class LoadImmInst(LoadInst):
129 def __init__(self, *args, **kargs):
130 super(LoadImmInst, self).__init__(*args, **kargs)
131 self.offset = self.op + " imm"
132
133 if self.add:
134 self.wbDecl = "MicroAddiUop(machInst, base, base, imm);"

--- 234 unchanged lines hidden --- 		120
121 class LoadImmInst(LoadInst):
122 def __init__(self, *args, **kargs):
123 super(LoadImmInst, self).__init__(*args, **kargs)
124 self.offset = self.op + " imm"
125
126 if self.add:
127 self.wbDecl = "MicroAddiUop(machInst, base, base, imm);"

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