ldr.isa (7725:00ea9430643b) | ldr.isa (7797:998b217dcae7) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 91 unchanged lines hidden (view full) --- 100 self.codeBlobs["ea_code"] = "EA = Base + %d;" % offset 101 102 wbDiff = -8 103 if self.add: 104 wbDiff = 8 105 accCode = ''' 106 CPSR cpsr = Cpsr; 107 SCTLR sctlr = Sctlr; | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 91 unchanged lines hidden (view full) --- 100 self.codeBlobs["ea_code"] = "EA = Base + %d;" % offset 101 102 wbDiff = -8 103 if self.add: 104 wbDiff = 8 105 accCode = ''' 106 CPSR cpsr = Cpsr; 107 SCTLR sctlr = Sctlr; |
108 ArmISA::PCState pc = PCS; 109 pc.instNPC(cSwap<uint32_t>(Mem.ud, cpsr.e)); | 108 // Use the version of NPC that gets set before NextThumb 109 pNPC = cSwap<uint32_t>(Mem.ud, cpsr.e); |
110 uint32_t newCpsr = 111 cpsrWriteByInstr(cpsr | CondCodes, 112 cSwap<uint32_t>(Mem.ud >> 32, cpsr.e), 113 0xF, true, sctlr.nmfi); 114 Cpsr = ~CondCodesMask & newCpsr; | 110 uint32_t newCpsr = 111 cpsrWriteByInstr(cpsr | CondCodes, 112 cSwap<uint32_t>(Mem.ud >> 32, cpsr.e), 113 0xF, true, sctlr.nmfi); 114 Cpsr = ~CondCodesMask & newCpsr; |
115 pc.nextThumb(((CPSR)newCpsr).t); 116 pc.nextJazelle(((CPSR)newCpsr).j); 117 PCS = pc; | 115 NextThumb = ((CPSR)newCpsr).t; 116 NextJazelle = ((CPSR)newCpsr).j; |
118 CondCodes = CondCodesMask & newCpsr; 119 ''' 120 self.codeBlobs["memacc_code"] = accCode 121 122 wbDecl = None 123 if self.writeback: 124 wbDecl = "MicroAddiUop(machInst, base, base, %d);" % wbDiff 125 self.emitHelper('RfeOp', wbDecl, ["IsSerializeAfter", "IsNonSpeculative"]) --- 242 unchanged lines hidden --- | 117 CondCodes = CondCodesMask & newCpsr; 118 ''' 119 self.codeBlobs["memacc_code"] = accCode 120 121 wbDecl = None 122 if self.writeback: 123 wbDecl = "MicroAddiUop(machInst, base, base, %d);" % wbDiff 124 self.emitHelper('RfeOp', wbDecl, ["IsSerializeAfter", "IsNonSpeculative"]) --- 242 unchanged lines hidden --- |