ldr.isa (7336:52dc042584d6) ldr.isa (7400:f6c9b27c4dbe)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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132
133 eaCode = "EA = Base + %d;" % offset
134
135 wbDiff = -8
136 if add:
137 wbDiff = 8
138 accCode = '''
139 CPSR cpsr = Cpsr;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 123 unchanged lines hidden (view full) ---

132
133 eaCode = "EA = Base + %d;" % offset
134
135 wbDiff = -8
136 if add:
137 wbDiff = 8
138 accCode = '''
139 CPSR cpsr = Cpsr;
140 SCTLR sctlr = Sctlr;
140 NPC = cSwap<uint32_t>(Mem.ud, cpsr.e);
141 uint32_t newCpsr =
142 cpsrWriteByInstr(cpsr | CondCodes,
143 cSwap<uint32_t>(Mem.ud >> 32, cpsr.e),
141 NPC = cSwap<uint32_t>(Mem.ud, cpsr.e);
142 uint32_t newCpsr =
143 cpsrWriteByInstr(cpsr | CondCodes,
144 cSwap<uint32_t>(Mem.ud >> 32, cpsr.e),
144 0xF, true);
145 0xF, true, sctlr.nmfi);
145 Cpsr = ~CondCodesMask & newCpsr;
146 CondCodes = CondCodesMask & newCpsr;
147 '''
148 if writeback:
149 accCode += "Base = Base + %s;\n" % wbDiff
150
151 global header_output, decoder_output, exec_output
152

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146 Cpsr = ~CondCodesMask & newCpsr;
147 CondCodes = CondCodesMask & newCpsr;
148 '''
149 if writeback:
150 accCode += "Base = Base + %s;\n" % wbDiff
151
152 global header_output, decoder_output, exec_output
153

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