1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 147 unchanged lines hidden (view full) --- 156 self.Name = self.nameFunc(self.post, self.add, self.writeback, 157 self.size, self.sign, self.user) 158 159 # Add memory request flags where necessary 160 self.memFlags.append("%d" % (self.size - 1)) 161 if self.user: 162 self.memFlags.append("ArmISA::TLB::UserMode") 163 |
164 self.instFlags = [] 165 if self.flavor == "dprefetch": |
166 self.memFlags.append("Request::PREFETCH") |
167 self.instFlags = ['IsDataPrefetch'] 168 elif self.flavor == "iprefetch": 169 self.memFlags.append("Request::PREFETCH") 170 self.instFlags = ['IsInstPrefetch'] |
171 elif self.flavor == "exclusive": 172 self.memFlags.append("Request::LLSC") 173 elif self.flavor == "normal": 174 self.memFlags.append("ArmISA::TLB::AllowUnaligned") 175 176 # Disambiguate the class name for different flavors of loads 177 if self.flavor != "normal": 178 self.Name = "%s_%s" % (self.name.upper(), self.Name) --- 6 unchanged lines hidden (view full) --- 185 eaCode += ";" 186 187 if self.flavor == "fp": 188 eaCode += vfpEnabledCheckCode 189 190 self.codeBlobs["ea_code"] = eaCode 191 192 # Code that actually handles the access |
193 if self.flavor == "dprefetch" or self.flavor == "iprefetch": |
194 accCode = 'uint64_t temp = Mem%s; temp = temp;' 195 elif self.flavor == "fp": 196 accCode = "FpDest.uw = cSwap(Mem%s, ((CPSR)Cpsr).e);\n" 197 else: 198 accCode = "IWDest = cSwap(Mem%s, ((CPSR)Cpsr).e);" 199 accCode = accCode % buildMemSuffix(self.sign, self.size) 200 201 self.codeBlobs["memacc_code"] = accCode 202 203 # Push it out to the output files 204 base = buildMemBase(self.basePrefix, self.post, self.writeback) 205 wbDecl = None 206 if self.writeback: 207 wbDecl = self.wbDecl |
208 self.emitHelper(base, wbDecl, self.instFlags) |
209 210 def loadImmClassName(post, add, writeback, size=4, sign=False, user=False): 211 return memClassName("LOAD_IMM", post, add, writeback, size, sign, user) 212 213 class LoadImm(LoadImmInst, LoadSingle): 214 decConstBase = 'LoadImm' 215 basePrefix = 'MemoryImm' 216 nameFunc = staticmethod(loadImmClassName) --- 108 unchanged lines hidden (view full) --- 325 RfeInst(mnem, True, True, False).emit() 326 RfeInst(mnem, True, False, True).emit() 327 RfeInst(mnem, True, False, False).emit() 328 RfeInst(mnem, False, True, True).emit() 329 RfeInst(mnem, False, True, False).emit() 330 RfeInst(mnem, False, False, True).emit() 331 RfeInst(mnem, False, False, False).emit() 332 |
333 def buildPrefetches(mnem, type): 334 LoadReg(mnem, False, False, False, size=1, flavor=type).emit() 335 LoadImm(mnem, False, False, False, size=1, flavor=type).emit() 336 LoadReg(mnem, False, True, False, size=1, flavor=type).emit() 337 LoadImm(mnem, False, True, False, size=1, flavor=type).emit() |
338 339 buildLoads("ldr") 340 buildLoads("ldrt", user=True) 341 buildLoads("ldrb", size=1) 342 buildLoads("ldrbt", size=1, user=True) 343 buildLoads("ldrsb", size=1, sign=True) 344 buildLoads("ldrsbt", size=1, sign=True, user=True) 345 buildLoads("ldrh", size=2) 346 buildLoads("ldrht", size=2, user=True) 347 buildLoads("hdrsh", size=2, sign=True) 348 buildLoads("ldrsht", size=2, sign=True, user=True) 349 350 buildDoubleLoads("ldrd") 351 352 buildRfeLoads("rfe") 353 |
354 buildPrefetches("pld", "dprefetch") 355 buildPrefetches("pldw", "dprefetch") 356 buildPrefetches("pli", "iprefetch") |
357 358 LoadImm("ldrex", False, True, False, size=4, flavor="exclusive").emit() 359 LoadImm("ldrexh", False, True, False, size=2, flavor="exclusive").emit() 360 LoadImm("ldrexb", False, True, False, size=1, flavor="exclusive").emit() 361 LoadDoubleImm("ldrexd", False, True, False, flavor="exclusive").emit() 362 363 LoadImm("vldr", False, True, False, size=4, flavor="fp").emit() 364 LoadImm("vldr", False, False, False, size=4, flavor="fp").emit() 365 LoadDoubleImm("vldr", False, True, False, flavor="fp").emit() 366 LoadDoubleImm("vldr", False, False, False, flavor="fp").emit() 367}}; |