3c3
< // Copyright (c) 2012-2013, 2016 ARM Limited
---
> // Copyright (c) 2012-2013, 2016-2018 ARM Limited
174a175,202
> halfIntConvCode = vfp64EnabledCheckCode + '''
> FPSCR fpscr = (FPSCR) FpscrExc;
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cDest = %(op)s;
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = 0;
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> FpscrExc = fpscr;
> '''
>
> halfIntConvCode2 = vfp64EnabledCheckCode + '''
> FPSCR fpscr = (FPSCR) FpscrExc;
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cOp2 = AA64FpOp2P0_uw;
> uint16_t cDest = %(op)s;
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = 0;
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> FpscrExc = fpscr;
> '''
>
> halfBinOp = "binaryOp(fpscr, AA64FpOp1P0, AA64FpOp2P0," + \
> "%(func)s, fpscr.fz, fpscr.dn, fpscr.rMode)"
> halfUnaryOp = "unaryOp(fpscr, AA64FpOp1P0," + \
> "%(func)s, fpscr.fz, fpscr.rMode)"
>
235c263
< def buildTernaryFpOp(name, opClass, sOp, dOp):
---
> def buildTernaryFpOp(name, opClass, hOp, sOp, dOp):
237c265
< for isDouble in True, False:
---
> for suffix in "D", "S", "H":
241c269
< if isDouble:
---
> if suffix == "H":
243,247c271,275
< uint64_t cOp1 = AA64FpOp1P0_uw | (uint64_t)AA64FpOp1P1_uw << 32;
< uint64_t cOp2 = AA64FpOp2P0_uw | (uint64_t)AA64FpOp2P1_uw << 32;
< uint64_t cOp3 = AA64FpOp3P0_uw | (uint64_t)AA64FpOp3P1_uw << 32;
< uint64_t cDest;
< ''' "cDest = " + dOp + ";" + '''
---
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cOp2 = AA64FpOp2P0_uw;
> uint16_t cOp3 = AA64FpOp3P0_uw;
> uint16_t cDest;
> ''' "cDest = " + hOp + ";" + '''
249c277
< AA64FpDestP1_uw = cDest >> 32;
---
> AA64FpDestP1_uw = 0;
251c279
< else:
---
> elif suffix == "S":
260a289,298
> elif suffix == "D":
> code += '''
> uint64_t cOp1 = AA64FpOp1P0_uw | (uint64_t)AA64FpOp1P1_uw << 32;
> uint64_t cOp2 = AA64FpOp2P0_uw | (uint64_t)AA64FpOp2P1_uw << 32;
> uint64_t cOp3 = AA64FpOp3P0_uw | (uint64_t)AA64FpOp3P1_uw << 32;
> uint64_t cDest;
> ''' "cDest = " + dOp + ";" + '''
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = cDest >> 32;
> '''
267c305
< iop = InstObjParams(name.lower(), name + ("D" if isDouble else "S"),
---
> iop = InstObjParams(name.lower(), name + suffix,
275a314
> "fplibMulAdd<uint16_t>(cOp3, cOp1, cOp2, fpscr)",
279,280c318,320
< "fplibMulAdd<uint32_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(cOp3, fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(cOp3, fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
282,283c322,327
< "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(fplibNeg<uint16_t>(cOp3), " +
> "fplibNeg<uint16_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), " +
> "fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), " +
> "fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
285,286c329,331
< "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), cOp1, cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), cOp1, cOp2, fpscr)" )
288c333
< def buildBinFpOp(name, Name, base, opClass, singleOp, doubleOp):
---
> def buildBinFpOp(name, Name, base, opClass, halfOp, singleOp, doubleOp):
290a336,340
> code = halfIntConvCode2 % { "op": halfOp }
> hIop = InstObjParams(name, Name + "H", base,
> { "code": code,
> "op_class": opClass }, [])
>
304c354
< for iop in sIop, dIop:
---
> for iop in hIop, sIop, dIop:
309a360
> "fplibAdd<uint16_t>(cOp1, cOp2, fpscr)",
312a364
> "fplibSub<uint16_t>(cOp1, cOp2, fpscr)",
315a368
> "fplibDiv<uint16_t>(cOp1, cOp2, fpscr)",
318a372
> "fplibMul<uint16_t>(cOp1, cOp2, fpscr)",
321a376
> "fplibNeg<uint16_t>(fplibMul<uint32_t>(cOp1, cOp2, fpscr))",
324a380
> "fplibMin<uint16_t>(cOp1, cOp2, fpscr)",
327a384
> "fplibMax<uint16_t>(cOp1, cOp2, fpscr)",
330a388
> "fplibMinNum<uint16_t>(cOp1, cOp2, fpscr)",
333a392
> "fplibMaxNum<uint16_t>(cOp1, cOp2, fpscr)",
337c396,397
< def buildUnaryFpOp(name, Name, base, opClass, singleOp, doubleOp = None):
---
> def buildUnaryFpOp(name, Name, base, opClass,
> halfOp, singleOp, doubleOp = None):
341a402,405
> code = halfIntConvCode % { "op": halfOp }
> hIop = InstObjParams(name, Name + "H", base,
> { "code": code,
> "op_class": opClass }, [])
354c418
< for iop in sIop, dIop:
---
> for iop in hIop, sIop, dIop:
360c424,426
< "fplibSqrt<uint32_t>(cOp1, fpscr)", "fplibSqrt<uint64_t>(cOp1, fpscr)")
---
> "fplibSqrt<uint16_t>(cOp1, fpscr)",
> "fplibSqrt<uint32_t>(cOp1, fpscr)",
> "fplibSqrt<uint64_t>(cOp1, fpscr)")
362c428
< def buildSimpleUnaryFpOp(name, Name, base, opClass, singleOp,
---
> def buildSimpleUnaryFpOp(name, Name, base, opClass, halfOp, singleOp,
368a435
> hCode = halfIntConvCode
371a439
> hCode = halfCode
375c443,444
< for code, op, suffix in [[sCode, singleOp, "S"],
---
> for code, op, suffix in [[hCode, halfOp, "H"],
> [sCode, singleOp, "S"],
389c458,460
< "fplibNeg<uint32_t>(cOp1)", "fplibNeg<uint64_t>(cOp1)")
---
> "fplibNeg<uint16_t>(cOp1)",
> "fplibNeg<uint32_t>(cOp1)",
> "fplibNeg<uint64_t>(cOp1)")
391c462,464
< "fplibAbs<uint32_t>(cOp1)", "fplibAbs<uint64_t>(cOp1)")
---
> "fplibAbs<uint16_t>(cOp1)",
> "fplibAbs<uint32_t>(cOp1)",
> "fplibAbs<uint64_t>(cOp1)")
393,394c466,468
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)")
396,397c470,472
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_POSINF, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_POSINF, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_POSINF, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_POSINF, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_POSINF, false, fpscr)")
399,400c474,476
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_NEGINF, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_NEGINF, false, fpscr)")
402,403c478,480
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_ZERO, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_ZERO, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_ZERO, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_ZERO, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_ZERO, false, fpscr)")
405,406c482,484
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)")
408,409c486,488
< "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), false, fpscr)")
411,412c490,492
< "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), true, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), true, fpscr)")
< // Copyright (c) 2012-2013, 2016 ARM Limited
---
> // Copyright (c) 2012-2013, 2016-2018 ARM Limited
174a175,202
> halfIntConvCode = vfp64EnabledCheckCode + '''
> FPSCR fpscr = (FPSCR) FpscrExc;
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cDest = %(op)s;
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = 0;
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> FpscrExc = fpscr;
> '''
>
> halfIntConvCode2 = vfp64EnabledCheckCode + '''
> FPSCR fpscr = (FPSCR) FpscrExc;
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cOp2 = AA64FpOp2P0_uw;
> uint16_t cDest = %(op)s;
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = 0;
> AA64FpDestP2_uw = 0;
> AA64FpDestP3_uw = 0;
> FpscrExc = fpscr;
> '''
>
> halfBinOp = "binaryOp(fpscr, AA64FpOp1P0, AA64FpOp2P0," + \
> "%(func)s, fpscr.fz, fpscr.dn, fpscr.rMode)"
> halfUnaryOp = "unaryOp(fpscr, AA64FpOp1P0," + \
> "%(func)s, fpscr.fz, fpscr.rMode)"
>
235c263
< def buildTernaryFpOp(name, opClass, sOp, dOp):
---
> def buildTernaryFpOp(name, opClass, hOp, sOp, dOp):
237c265
< for isDouble in True, False:
---
> for suffix in "D", "S", "H":
241c269
< if isDouble:
---
> if suffix == "H":
243,247c271,275
< uint64_t cOp1 = AA64FpOp1P0_uw | (uint64_t)AA64FpOp1P1_uw << 32;
< uint64_t cOp2 = AA64FpOp2P0_uw | (uint64_t)AA64FpOp2P1_uw << 32;
< uint64_t cOp3 = AA64FpOp3P0_uw | (uint64_t)AA64FpOp3P1_uw << 32;
< uint64_t cDest;
< ''' "cDest = " + dOp + ";" + '''
---
> uint16_t cOp1 = AA64FpOp1P0_uw;
> uint16_t cOp2 = AA64FpOp2P0_uw;
> uint16_t cOp3 = AA64FpOp3P0_uw;
> uint16_t cDest;
> ''' "cDest = " + hOp + ";" + '''
249c277
< AA64FpDestP1_uw = cDest >> 32;
---
> AA64FpDestP1_uw = 0;
251c279
< else:
---
> elif suffix == "S":
260a289,298
> elif suffix == "D":
> code += '''
> uint64_t cOp1 = AA64FpOp1P0_uw | (uint64_t)AA64FpOp1P1_uw << 32;
> uint64_t cOp2 = AA64FpOp2P0_uw | (uint64_t)AA64FpOp2P1_uw << 32;
> uint64_t cOp3 = AA64FpOp3P0_uw | (uint64_t)AA64FpOp3P1_uw << 32;
> uint64_t cDest;
> ''' "cDest = " + dOp + ";" + '''
> AA64FpDestP0_uw = cDest;
> AA64FpDestP1_uw = cDest >> 32;
> '''
267c305
< iop = InstObjParams(name.lower(), name + ("D" if isDouble else "S"),
---
> iop = InstObjParams(name.lower(), name + suffix,
275a314
> "fplibMulAdd<uint16_t>(cOp3, cOp1, cOp2, fpscr)",
279,280c318,320
< "fplibMulAdd<uint32_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(cOp3, fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(cOp3, fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(cOp3, fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
282,283c322,327
< "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(fplibNeg<uint16_t>(cOp3), " +
> "fplibNeg<uint16_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), " +
> "fplibNeg<uint32_t>(cOp1), cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), " +
> "fplibNeg<uint64_t>(cOp1), cOp2, fpscr)" )
285,286c329,331
< "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
< "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), cOp1, cOp2, fpscr)" )
---
> "fplibMulAdd<uint16_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
> "fplibMulAdd<uint32_t>(fplibNeg<uint32_t>(cOp3), cOp1, cOp2, fpscr)",
> "fplibMulAdd<uint64_t>(fplibNeg<uint64_t>(cOp3), cOp1, cOp2, fpscr)" )
288c333
< def buildBinFpOp(name, Name, base, opClass, singleOp, doubleOp):
---
> def buildBinFpOp(name, Name, base, opClass, halfOp, singleOp, doubleOp):
290a336,340
> code = halfIntConvCode2 % { "op": halfOp }
> hIop = InstObjParams(name, Name + "H", base,
> { "code": code,
> "op_class": opClass }, [])
>
304c354
< for iop in sIop, dIop:
---
> for iop in hIop, sIop, dIop:
309a360
> "fplibAdd<uint16_t>(cOp1, cOp2, fpscr)",
312a364
> "fplibSub<uint16_t>(cOp1, cOp2, fpscr)",
315a368
> "fplibDiv<uint16_t>(cOp1, cOp2, fpscr)",
318a372
> "fplibMul<uint16_t>(cOp1, cOp2, fpscr)",
321a376
> "fplibNeg<uint16_t>(fplibMul<uint32_t>(cOp1, cOp2, fpscr))",
324a380
> "fplibMin<uint16_t>(cOp1, cOp2, fpscr)",
327a384
> "fplibMax<uint16_t>(cOp1, cOp2, fpscr)",
330a388
> "fplibMinNum<uint16_t>(cOp1, cOp2, fpscr)",
333a392
> "fplibMaxNum<uint16_t>(cOp1, cOp2, fpscr)",
337c396,397
< def buildUnaryFpOp(name, Name, base, opClass, singleOp, doubleOp = None):
---
> def buildUnaryFpOp(name, Name, base, opClass,
> halfOp, singleOp, doubleOp = None):
341a402,405
> code = halfIntConvCode % { "op": halfOp }
> hIop = InstObjParams(name, Name + "H", base,
> { "code": code,
> "op_class": opClass }, [])
354c418
< for iop in sIop, dIop:
---
> for iop in hIop, sIop, dIop:
360c424,426
< "fplibSqrt<uint32_t>(cOp1, fpscr)", "fplibSqrt<uint64_t>(cOp1, fpscr)")
---
> "fplibSqrt<uint16_t>(cOp1, fpscr)",
> "fplibSqrt<uint32_t>(cOp1, fpscr)",
> "fplibSqrt<uint64_t>(cOp1, fpscr)")
362c428
< def buildSimpleUnaryFpOp(name, Name, base, opClass, singleOp,
---
> def buildSimpleUnaryFpOp(name, Name, base, opClass, halfOp, singleOp,
368a435
> hCode = halfIntConvCode
371a439
> hCode = halfCode
375c443,444
< for code, op, suffix in [[sCode, singleOp, "S"],
---
> for code, op, suffix in [[hCode, halfOp, "H"],
> [sCode, singleOp, "S"],
389c458,460
< "fplibNeg<uint32_t>(cOp1)", "fplibNeg<uint64_t>(cOp1)")
---
> "fplibNeg<uint16_t>(cOp1)",
> "fplibNeg<uint32_t>(cOp1)",
> "fplibNeg<uint64_t>(cOp1)")
391c462,464
< "fplibAbs<uint32_t>(cOp1)", "fplibAbs<uint64_t>(cOp1)")
---
> "fplibAbs<uint16_t>(cOp1)",
> "fplibAbs<uint32_t>(cOp1)",
> "fplibAbs<uint64_t>(cOp1)")
393,394c466,468
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEEVEN, false, fpscr)")
396,397c470,472
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_POSINF, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_POSINF, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_POSINF, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_POSINF, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_POSINF, false, fpscr)")
399,400c474,476
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_NEGINF, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_NEGINF, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_NEGINF, false, fpscr)")
402,403c478,480
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_ZERO, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_ZERO, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_ZERO, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_ZERO, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_ZERO, false, fpscr)")
405,406c482,484
< "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPRounding_TIEAWAY, false, fpscr)")
408,409c486,488
< "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), false, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), false, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), false, fpscr)")
411,412c490,492
< "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
< "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), true, fpscr)")
---
> "fplibRoundInt<uint16_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
> "fplibRoundInt<uint32_t>(cOp1, FPCRRounding(fpscr), true, fpscr)",
> "fplibRoundInt<uint64_t>(cOp1, FPCRRounding(fpscr), true, fpscr)")