fp.isa (7783:9b880b40ac10) fp.isa (8070:af0d29feb39d)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 195 unchanged lines hidden (view full) ---

204 vmsrFpscrCode = vmsrEnabledCheckCode + '''
205 Fpscr = Op1 & ~FpCondCodesMask;
206 FpCondCodes = Op1 & FpCondCodesMask;
207 '''
208 vmsrFpscrIop = InstObjParams("vmsr", "VmsrFpscr", "FpRegRegOp",
209 { "code": vmsrFpscrCode,
210 "predicate_test": predicateTest,
211 "op_class": "SimdFloatMiscOp" },
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 195 unchanged lines hidden (view full) ---

204 vmsrFpscrCode = vmsrEnabledCheckCode + '''
205 Fpscr = Op1 & ~FpCondCodesMask;
206 FpCondCodes = Op1 & FpCondCodesMask;
207 '''
208 vmsrFpscrIop = InstObjParams("vmsr", "VmsrFpscr", "FpRegRegOp",
209 { "code": vmsrFpscrCode,
210 "predicate_test": predicateTest,
211 "op_class": "SimdFloatMiscOp" },
212 ["IsSerializeAfter","IsNonSpeculative"])
212 ["IsSerializeAfter","IsNonSpeculative",
213 "IsSquashAfter"])
213 header_output += FpRegRegOpDeclare.subst(vmsrFpscrIop);
214 decoder_output += FpRegRegOpConstructor.subst(vmsrFpscrIop);
215 exec_output += PredOpExecute.subst(vmsrFpscrIop);
216
217 vmrsIop = InstObjParams("vmrs", "Vmrs", "FpRegRegOp",
218 { "code": vmrsEnabledCheckCode + \
219 "Dest = MiscOp1;",
220 "predicate_test": predicateTest,

--- 1432 unchanged lines hidden --- 		214 header_output += FpRegRegOpDeclare.subst(vmsrFpscrIop);
215 decoder_output += FpRegRegOpConstructor.subst(vmsrFpscrIop);
216 exec_output += PredOpExecute.subst(vmsrFpscrIop);
217
218 vmrsIop = InstObjParams("vmrs", "Vmrs", "FpRegRegOp",
219 { "code": vmrsEnabledCheckCode + \
220 "Dest = MiscOp1;",
221 "predicate_test": predicateTest,

--- 1432 unchanged lines hidden ---