fp.isa (7397:cbd950459a29) fp.isa (7398:063002e7106b)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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907 '''
908 vcvtFpDFpSIop = InstObjParams("vcvt", "VcvtFpDFpS", "FpRegRegOp",
909 { "code": vcvtFpDFpSCode,
910 "predicate_test": predicateTest }, [])
911 header_output += FpRegRegOpDeclare.subst(vcvtFpDFpSIop);
912 decoder_output += FpRegRegOpConstructor.subst(vcvtFpDFpSIop);
913 exec_output += PredOpExecute.subst(vcvtFpDFpSIop);
914
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 898 unchanged lines hidden (view full) ---

907 '''
908 vcvtFpDFpSIop = InstObjParams("vcvt", "VcvtFpDFpS", "FpRegRegOp",
909 { "code": vcvtFpDFpSCode,
910 "predicate_test": predicateTest }, [])
911 header_output += FpRegRegOpDeclare.subst(vcvtFpDFpSIop);
912 decoder_output += FpRegRegOpConstructor.subst(vcvtFpDFpSIop);
913 exec_output += PredOpExecute.subst(vcvtFpDFpSIop);
914
915 vcvtFpHTFpSCode = '''
916 FPSCR fpscr = Fpscr;
917 vfpFlushToZero(fpscr, FpOp1);
918 VfpSavedState state = prepFpState(fpscr.rMode);
919 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
920 FpDest = vcvtFpHFpS(fpscr, FpOp1, true);
921 __asm__ __volatile__("" :: "m" (FpDest));
922 finishVfp(fpscr, state);
923 Fpscr = fpscr;
924 '''
925 vcvtFpHTFpSIop = InstObjParams("vcvtt", "VcvtFpHTFpS", "FpRegRegOp",
926 { "code": vcvtFpHTFpSCode,
927 "predicate_test": predicateTest }, [])
928 header_output += FpRegRegOpDeclare.subst(vcvtFpHTFpSIop);
929 decoder_output += FpRegRegOpConstructor.subst(vcvtFpHTFpSIop);
930 exec_output += PredOpExecute.subst(vcvtFpHTFpSIop);
931
932 vcvtFpHBFpSCode = '''
933 FPSCR fpscr = Fpscr;
934 VfpSavedState state = prepFpState(fpscr.rMode);
935 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
936 FpDest = vcvtFpHFpS(fpscr, FpOp1, false);
937 __asm__ __volatile__("" :: "m" (FpDest));
938 finishVfp(fpscr, state);
939 Fpscr = fpscr;
940 '''
941 vcvtFpHBFpSIop = InstObjParams("vcvtb", "VcvtFpHBFpS", "FpRegRegOp",
942 { "code": vcvtFpHBFpSCode,
943 "predicate_test": predicateTest }, [])
944 header_output += FpRegRegOpDeclare.subst(vcvtFpHBFpSIop);
945 decoder_output += FpRegRegOpConstructor.subst(vcvtFpHBFpSIop);
946 exec_output += PredOpExecute.subst(vcvtFpHBFpSIop);
947
948 vcvtFpSFpHTCode = '''
949 FPSCR fpscr = Fpscr;
950 vfpFlushToZero(fpscr, FpOp1);
951 VfpSavedState state = prepFpState(fpscr.rMode);
952 __asm__ __volatile__("" : "=m" (FpOp1), "=m" (FpDest)
953 : "m" (FpOp1), "m" (FpDest));
954 FpDest = vcvtFpSFpH(fpscr, FpOp1, FpDest, true);
955 __asm__ __volatile__("" :: "m" (FpDest));
956 finishVfp(fpscr, state);
957 Fpscr = fpscr;
958 '''
959 vcvtFpSFpHTIop = InstObjParams("vcvtt", "VcvtFpSFpHT", "FpRegRegOp",
960 { "code": vcvtFpHTFpSCode,
961 "predicate_test": predicateTest }, [])
962 header_output += FpRegRegOpDeclare.subst(vcvtFpSFpHTIop);
963 decoder_output += FpRegRegOpConstructor.subst(vcvtFpSFpHTIop);
964 exec_output += PredOpExecute.subst(vcvtFpSFpHTIop);
965
966 vcvtFpSFpHBCode = '''
967 FPSCR fpscr = Fpscr;
968 vfpFlushToZero(fpscr, FpOp1);
969 VfpSavedState state = prepFpState(fpscr.rMode);
970 __asm__ __volatile__("" : "=m" (FpOp1), "=m" (FpDest)
971 : "m" (FpOp1), "m" (FpDest));
972 FpDest = vcvtFpSFpH(fpscr, FpOp1, FpDest, false);
973 __asm__ __volatile__("" :: "m" (FpDest));
974 finishVfp(fpscr, state);
975 Fpscr = fpscr;
976 '''
977 vcvtFpSFpHBIop = InstObjParams("vcvtb", "VcvtFpSFpHB", "FpRegRegOp",
978 { "code": vcvtFpSFpHBCode,
979 "predicate_test": predicateTest }, [])
980 header_output += FpRegRegOpDeclare.subst(vcvtFpSFpHBIop);
981 decoder_output += FpRegRegOpConstructor.subst(vcvtFpSFpHBIop);
982 exec_output += PredOpExecute.subst(vcvtFpSFpHBIop);
983
915 vcmpSCode = '''
916 FPSCR fpscr = Fpscr;
917 vfpFlushToZero(fpscr, FpDest, FpOp1);
918 if (FpDest == FpOp1) {
919 fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0;
920 } else if (FpDest < FpOp1) {
921 fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0;
922 } else if (FpDest > FpOp1) {

--- 501 unchanged lines hidden --- 		984 vcmpSCode = '''
985 FPSCR fpscr = Fpscr;
986 vfpFlushToZero(fpscr, FpDest, FpOp1);
987 if (FpDest == FpOp1) {
988 fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0;
989 } else if (FpDest < FpOp1) {
990 fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0;
991 } else if (FpDest > FpOp1) {

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